Analytical model of double gate MOSFET for high sensitivity low power photosensor
In this paper, a high-sensitivity low power photodetector using double gate (DG) MOSFET is
proposed for the first time using change in subthreshold current under illumination as the …
proposed for the first time using change in subthreshold current under illumination as the …
Full adder design with gdi cell and independent double gate transistor
S Abbasalizadeh… - 20th Iranian Conference on …, 2012 - ieeexplore.ieee.org
This paper proposes 1 bit full adder using double-gate FinFet transistor and Gate Diffusion
Input (GDI) technique. Using GDI cell makes it possible to reduce the number of transistors …
Input (GDI) technique. Using GDI cell makes it possible to reduce the number of transistors …
Double gate MOSFET and its application for efficient digital circuits
SK Gupta, GG Pathak, D Das… - 2011 3rd International …, 2011 - ieeexplore.ieee.org
Double-Gate MOSFET (DGFET) is one of the promising technologies for sub-50 nm
transistor design. To accommodate future technology nodes, transistor dimensions have to …
transistor design. To accommodate future technology nodes, transistor dimensions have to …
[PDF][PDF] Design and simulation of a two stage opamp using dg mosfets for low power and low voltage applications
SK Gupta, GG Pathak, D Das… - International Journal of …, 2011 - researchgate.net
Double Gate MOSFET (DGFET) is one of the promising technologies for sub-50nm transistor
design. To accommodate future technology nodes transistor dimensions have to be reduced …
design. To accommodate future technology nodes transistor dimensions have to be reduced …
Modelling and simulation of 10nm strained channel DG-nano-FET
Strained silicon technology is one of the promising technology for sub-10nm Metal Oxide
Semiconductor Field Effect Transistor (MOSFET) design. To match with advance technology …
Semiconductor Field Effect Transistor (MOSFET) design. To match with advance technology …
[PDF][PDF] TID Effect in SOI Technology
K Ni - ustc.edu.cn
In this paper, a brief overview of TID effect in SOI technology is presented. The introduction
of buried oxide (BOX) adds vulnerability to TID effect in SOI transistors because of its large …
of buried oxide (BOX) adds vulnerability to TID effect in SOI transistors because of its large …