Unprotected computing: A large-scale study of dram raw error rate on a supercomputer
L Bautista-Gomez, F Zyulkyarov… - SC'16: Proceedings …, 2016 - ieeexplore.ieee.org
Supercomputers offer new opportunities for scientific computing as they grow in size.
However, their growth also poses new challenges. Resilience has been recognized as one …
However, their growth also poses new challenges. Resilience has been recognized as one …
Entropy and energy bounds for metastability based TRNG with lightweight post-processing
VB Suresh, WP Burleson - … on Circuits and Systems I: Regular …, 2015 - ieeexplore.ieee.org
On-chip True Random Number Generators (TRNG) are important cryptographic primitives in
a variety of applications. In advanced CMOS process technologies, intra-die variations in …
a variety of applications. In advanced CMOS process technologies, intra-die variations in …
Efficient hamming weight comparators for binary vectors based on accumulative and up/down parallel counters
B Parhami - IEEE Transactions on Circuits and Systems II …, 2009 - ieeexplore.ieee.org
New counting-based methods for comparing the Hamming weight of a binary vector with a
constant, as well as comparing the Hamming weights of two input vectors, are proposed. It is …
constant, as well as comparing the Hamming weights of two input vectors, are proposed. It is …
Runtime thermal management using software agents for multi-and many-core architectures
Editor's note: System-level runtime approaches provide a new dimension of variation
tolerance in multi-and many-core systems. This article looks into a scalable system-level …
tolerance in multi-and many-core systems. This article looks into a scalable system-level …
A novel adaptive design methodology for minimum leakage power considering PVT variations on nanoscale VLSI systems
KK Kim, YB Kim - IEEE transactions on very large scale …, 2009 - ieeexplore.ieee.org
This paper proposes a novel design method to minimize the leakage power during standby
mode using a novel adaptive supply voltage and body-bias voltage generating technique for …
mode using a novel adaptive supply voltage and body-bias voltage generating technique for …
An analytical framework for estimating tco and exploring data center design space
In this paper, we present EETCO: an estimation and exploration tool that provides qualitative
assessment of data center design decisions on Total-Cost-of-Ownership (TCO) and …
assessment of data center design decisions on Total-Cost-of-Ownership (TCO) and …
Accurate characterization of the variability in power consumption in modern mobile processors
The variability in performance and power consumption is slated to grow further with
continued scaling of process technologies. While this variability has been studied and …
continued scaling of process technologies. While this variability has been studied and …
Machine learning techniques for modeling and performance analysis of interconnects
JN Tripathi, H Vaghasiya, D Junjariya… - IEEE Open Journal of …, 2021 - ieeexplore.ieee.org
Interconnects are essential components of any electronic system. Their design, modeling
and optimization are becoming complex and computationally expensive with the evolution of …
and optimization are becoming complex and computationally expensive with the evolution of …
Scheduling threads on different processor cores based on memory temperature
Techniques for scheduling a thread running in a computer system are disclosed. Example
computer systems may include but are not limited to a multiprocessor having first and …
computer systems may include but are not limited to a multiprocessor having first and …
Core selection for applications running on multiprocessor systems based on core and application characteristics
7,954, 101 B2 5/2011 Adachi et al. 8,122,187 B2 2/2012 Walker et al. 8,161,304 B2 4/2012
Hamilton 2002fO112097 A1 2004/O193778 A1 2004/O19973O A1 2005/O12O252 A1 …
Hamilton 2002fO112097 A1 2004/O193778 A1 2004/O19973O A1 2005/O12O252 A1 …