This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …

This paper presents a novel test-data volume-compression methodology called the
embedded deterministic test (EDT), which reduces manufacturing test cost by providing one …

Test data compression consists of test vector compression on the input side and response,
compaction on the output side. This vector compression has been an active area of …

We present a new test-data compression method and decompression architecture based on
variable-to-variable-length Golomb codes. The proposed method is especially suitable for …

This paper introduces embedded deterministic test (EDT) technology, which reduces
manufacturing test cost by providing one to two orders of magnitude reduction in scan test …

Rapid increases in the wire-able gate counts of ASICs stress existing manufacturing test
equipment in terms of test data volume and test capacity. Techniques are presented in this …

We propose a new design for testability technique, Parallel Serial Full Scan (PSFS), for
reducing the test application time for full scan embedded cores. Test application time …

This paper presents a compression/decompression scheme based on selective Huffman
coding for reducing the amount of test data that must be stored on a tester and transferred to …

Test data compression and test resource partitioning (TRP) are necessary to reduce the
volume of test data for system-on-a-chip designs. We present a new class of variable-to …

This paper presents an overview of an intelligence platform we have built to address threat
hunting and incident investigation use-cases in the cyber security domain. Specifically, we …