A survey of recent prefetching techniques for processor caches

S Mittal - ACM Computing Surveys (CSUR), 2016 - dl.acm.org
As the trends of process scaling make memory systems an even more crucial bottleneck, the
importance of latency hiding techniques such as prefetching grows further. However, naively …

Pythia: A customizable hardware prefetching framework using online reinforcement learning

R Bera, K Kanellopoulos, A Nori, T Shahroodi… - MICRO-54: 54th Annual …, 2021 - dl.acm.org
Past research has proposed numerous hardware prefetching techniques, most of which rely
on exploiting one specific type of program context information (eg, program counter …

Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation

K Hsieh, S Khan, N Vijaykumar… - 2016 IEEE 34th …, 2016 - ieeexplore.ieee.org
Pointer chasing is a fundamental operation, used by many important data-intensive
applications (eg, databases, key-value stores, graph processing workloads) to traverse …

[图书][B] Memory systems: cache, DRAM, disk

B Jacob, D Wang, S Ng - 2010 - books.google.com
Is your memory hierarchy stopping your microprocessor from performing at the high level it
should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …

Data cache prefetching using a global history buffer

KJ Nesbit, JE Smith - 10th International Symposium on High …, 2004 - ieeexplore.ieee.org
A new structure for implementing data cache prefetching is proposed and analyzed via
simulation. The structure is based on a Global History Buffer that holds the most recent miss …

A hierarchical neural model of data prefetching

Z Shi, A Jain, K Swersky, M Hashemi… - Proceedings of the 26th …, 2021 - dl.acm.org
This paper presents Voyager, a novel neural network for data prefetching. Unlike previous
neural models for prefetching, which are limited to learning delta correlations, our model can …

Linearizing irregular memory accesses for improved correlated prefetching

A Jain, C Lin - Proceedings of the 46th Annual IEEE/ACM …, 2013 - dl.acm.org
This paper introduces the Irregular Stream Buffer (ISB), a prefetcher that targets irregular
sequences of temporally correlated memory references. The key idea is to use an extra level …

Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency

H Liu, M Ferdman, J Huh… - 2008 41st IEEE/ACM …, 2008 - ieeexplore.ieee.org
Data caches in general-purpose microprocessors often contain mostly dead blocks and are
thus used inefficiently. To improve cache efficiency, dead blocks should be identified and …

Domino temporal data prefetcher

M Bakhshalipour, P Lotfi-Kamran… - … Symposium on High …, 2018 - ieeexplore.ieee.org
Big-data server applications frequently encounter data misses, and hence, lose significant
performance potential. One way to reduce the number of data misses or their effect is data …

Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems

E Ebrahimi, O Mutlu, YN Patt - 2009 IEEE 15th International …, 2009 - ieeexplore.ieee.org
Linked data structure (LDS) accesses are critical to the performance of many large scale
applications. Techniques have been proposed to prefetch such accesses. Unfortunately …