SR Sahu, BK Bhoi, M Pradhan - IET Circuits, Devices & …, 2020 - Wiley Online Library
Vedic algorithm is beneficial for the application in the design of high‐speed computing and hardware. This study presents a fast signed binary multiplication structure based on Vedic …
HM Rakesh, GS Sunitha - 2020 International Conference for …, 2020 - ieeexplore.ieee.org
In today's smart and fast computing world, the designing of high speed and low energy consumption based Digital Signal Processors (DSPs) is a realistic and ever embryonic area …
This study presents a high‐speed signed Vedic multiplier (SVM) architecture using redundant binary (RB) representation in Urdhva Tiryagbhyam (UT) sutra. This is the first ever …
The optimization of VLSI design is playing an important role in the development of technological applications. The optimization of VLSI technology helps to increase the …
In modern systems, the square root of a number is calculated using the long division method. The radical can be calculated using several diverse approaches. This study focuses …
N Behera, M Pradhan, PK Mishro - Proceedings of the International …, 2023 - Springer
In a digital verification system, multipliers play a crucial role. In practice, multipliers are grouped in to unsigned and signed types. An unsigned multiplier performs the multiplication …
S Barve, S Raveendran, C Korde… - … on Smart Electronic …, 2018 - ieeexplore.ieee.org
Squaring and cubing units have importance in various applications in digital signal processing. This paper proposes new squaring architectures based on vedic mathematics …
SK Panda, DC Panda - Progress in Computing, Analytics and Networking …, 2018 - Springer
With the initiation of ancient Vedic mathematics (AVM) concepts, very large-scale integration technique becomes more powerful in developing various VLSI computing systems. In the …
M Thakare, P Yash, D Chakraborty… - 2021 IEEE international …, 2021 - ieeexplore.ieee.org
Modern computational devices are in need of efficient and optimized hardware architectures with low power and reduced computational complexity. This work presents an efficient and …