RF with linearity and non-linearity parameter analysis of gate all around negative capacitance junction less FET (GAA-NC-JLFET) for different ferroelectric thickness

P Raut, U Nanda, DK Panda - Physica Scripta, 2022 - iopscience.iop.org
Abstract A novel Gate All Around Negative Capacitance Junction less FET (GAA-NC-JLFET)
is proposed in this work, where different RF/Analog, Linear, and Non-linear parameters were …

Performance analysis of gate electrode work function variations in double-gate junctionless FET

S Kumar, AK Chatterjee, R Pandey - Silicon, 2021 - Springer
With inherent structural simplicity due to the omission of ultrasteep pn junctions, the
conventional junctionless FET can be used as a barrier-controlled device with low OFF …

Mid-wave infrared optical receiver based on an InAsSb-nBn photodetector using the barrier doping engineering technique for low-power satellite optical wireless …

M Shaveisi, P Aliparast - Applied Optics, 2023 - opg.optica.org
This paper proposes a new nBn photodetector (nBn-PD) based on InAsSb with a barrier
doping engineering technique [core–shell doped barrier (CSD-B) nBn-PD] for utilization as a …

Threshold voltage modeling of Gaussian-doped Dual work function Material Cylindrical Gate-all-around (CGAA) MOSFET considering the effect of temperature and …

P Banerjee, J Das - Microelectronics Journal, 2022 - Elsevier
Current research endeavor encompasses comprehensive threshold voltage analysis of a
Gaussian-doped Dual work function Material (DM) Cylindrical Gate-all-around (CGAA) …

Performance enhancement of recessed silicon channel double gate junctionless field-effect-transistor using TCAD tool

S Kumar, AK Chatterjee, R Pandey - Journal of Computational Electronics, 2021 - Springer
In this paper, we propose an n-type double gate junctionless field-effect-transistor using
recessed silicon channel. The recessed silicon channel reduces the channel thickness …

Doping engineering to enhance the performance of a rectangular core shell double gate junctionless field effect transistor

V Narula, M Agarwal - Semiconductor Science and Technology, 2020 - iopscience.iop.org
This paper describes different architectures of a rectangular core shell double gate
junctionless field effect transistor (RCS-DGJLT). The device performance has been studied …

Modeling threshold voltage and drain-induced barrier lowering effect of opposite doping core–shell channel surrounding-gate junctionless MOSFET

L Xu, G Wu, P Li, T Cheng - Microelectronics Journal, 2023 - Elsevier
For the sake of promoting core–shell channel (CSC) junctionless (JL) MOSFET, this paper
models opposite doping core–shell channel (ODCSC) surrounding-gate (SG) JL MOSFET …

Low-noise Si/Si0.5Ge0.5 SOI junctionless TeraFET for designing sub-0.5 dB ultra-broadband LNA in 6G applications

M Fallahnejad, A Khodabakhsh, A Amini… - Applied Physics A, 2023 - Springer
Impurity scattering in junctionless transistors reduces electron velocity in the channel, so the
performance of analog/RF at high frequencies degrades. For the first time, this study offers …

Influence of deep level trap charges on the reliability of asymmetric doped double gate JunctionLess transistor (AD-DG-JLT)

V Kumari, KMU Nisa, M Gupta, M Saxena - Microelectronics Reliability, 2023 - Elsevier
A study based on the numerical simulation of Double Gate JunctionLess Transistor DG-JLT
has been presented under the influence of Trap Charges (TC) inside the oxide or at the …

Analytical Modeling of Core–Shell Junctionless RADFET dosimeter of Improved Sensitivity

S Ghosh, P Saha, A Mukherjee, S Bose… - Silicon, 2022 - Springer
In this work, a Core–Shell Junctionless MOSFET is proposed as a RADFET dosimeter for
possible radiation-sensitive applications. The analytical models of the surface potential …