Text categorization is an important task with plenty of applications, ranging from sentiment
analysis to automated news classification. In this paper, we introduce a novel graph-based …

In the paper, innovative CNT based encoder and two priority encoders have been designed,
simulated and compared with conventional CMOS encoder and priority encoders at 32 nm …

In our prior study of an L-bit priority encoder (PE), a so-called one-directional-array to two-
directional-array conversion method is deployed to turn an L-bit input data into an M× N-bit …

In this paper, a scalable high-performance multi-match priority encoder (MPE) for
information retrieval is presented. This approach deploys a new design architecture to …

An N-bit priority resolver having N inputs and N outputs functions as polling hardware in an
embedded system, enabling access to a resource when multiple devices initiate access …

A n-input, n-output priority encoder, implemented in hardware, often serves as a polling
device that permits access to a single (hardware) resource whenever access requests …

The performance of priority encoder circuits is usually limited by the delay associated with
the propagation of the priority token, however, proper design in the architectural level can …

In this paper, a high-performance priority encoder of the 2-dimensional array is investigated
and modified. This work involves 64-bit priority encoder design and verification using Verilog …

A high-performance and energy-efficient 256-bit CMOS priority encoder is presented and
realized on transistor level using 32 nm predictive technology. The new circuit is designed …

A 4-input, 3-output priority encoder, implemented in Hardware, often serves as a polling
device that permits access to a single (hardware) resource whenever access requests …