Effects of varying the fin width, fin height, gate dielectric material, and gate length on the DC and RF performance of a 14-nm SOI FinFET structure

NEI Boukortt, TR Lenka, S Patanè, G Crupi - Electronics, 2021 - mdpi.com
The FinFET architecture has attracted growing attention over the last two decades since its
invention, owing to the good control of the gate electrode over the conductive channel …

Performance evaluation of linearity and intermodulation distortion of nanoscale GaN-SOI FinFET for RFIC design

A Kumar, N Gupta, SK Tripathi, MM Tripathi… - … -International Journal of …, 2020 - Elsevier
This work presents, performance evaluation of linearity and intermodulation distortion of
novel nanoscale Gallium Nitride (GaN) Silicon-on-Insulator (SOI) N-channel FinFET (n …

Numerical study of JAM-GS-GAA FinFET: a Fin aspect ratio optimization for upgraded analog and intermodulation distortion performance

B Kumar, R Chaujar - Silicon, 2022 - Springer
This paper optimizes the fin aspect ratio (AR) of Junctionless Accumulation Mode Gate Stack
Gate All Around (JAM-GS-GAA) FinFET with constant conducting channel area for upgraded …

Design of Polymer‐Based Trigate Nanoscale FinFET for the Implementation of Two‐Stage Operational Amplifier

JV Suman, KK Cheepurupalli… - International Journal of …, 2022 - Wiley Online Library
The major motivation behind transistor scaling is the requirement for high‐speed transistors
with lower fabrication costs. When the fin thickness or breadth is smaller than 10 nm in a …

Influence of device architecture on the performance of negative capacitance MFMIS transistors

FI Sakib, FE Mullick, S Shahnewaz… - Semiconductor …, 2019 - iopscience.iop.org
We report a comparative analysis of the performance of negative capacitance field-effect
transistors (NCFETs) with single gate, double gate, tri-gate (FinFET) and gate-all-around …

Impact of channel doping concentration on the performance characteristics and the reliability of ultra-thin double gate DG-FinFET compared with nano-single gate FD …

N Bourahla, B Hadri, A Bourahla - Silicon, 2022 - Springer
The efficiency of the integrated circuit (IC) as the reliability, speed, high production costs,
and power consumption will be reduced by the nanometric size of the MOSFET transistor …

Electrical Characterization of highly stable 10nm triple-gate FinFET for different contacts and oxide region materials

KB Madhavi, SL Tripathi - Silicon, 2022 - Springer
Increasing dependencies on smart portable devices and requirement of longer battery back
needs low power high speed, more reliable transistors for digital and memory applications …

Performance analysis and optimization of 10 nm TG n-and p-channel SOI FinFETs for circuit applications

A Lazzaz, K Bousbahi… - Facta Universitatis, Series …, 2022 - casopisi.junis.ni.ac.rs
This paper analyses the electrical characteristics of 10 nm tri-gate (TG) N-and P-channel
silicon-on-insulator (SOI) FinFETs with hafnium oxide gate dielectric. The analysis has been …

3D investigation of 8-nm tapered n-FinFET model

N Boukortt, S Patanè, G Crupi - Silicon, 2020 - Springer
The miniaturization has become a key word for advanced integrated circuits over the last few
years. It is within this context that the fin field effect transistor (FinFET) has appeared as a …

Optimized mathematical model of experimental characteristics of 14 nm TG N FinFET

A Lazzaz, K Bousbahi, M Ghamnia - Micro and Nanostructures, 2022 - Elsevier
Quantum effects play a dominant role in nanometric structures for which we need to use new
methods to describe this phenomenon in device characterizations. In this paper an …