The future of FPGA acceleration in datacenters and the cloud

C Bobda, JM Mbongue, P Chow, M Ewais… - ACM Transactions on …, 2022 - dl.acm.org
In this article, we survey existing academic and commercial efforts to provide Field-
Programmable Gate Array (FPGA) acceleration in datacenters and the cloud. The goal is a …

FPGA-based Physical Unclonable Functions: A comprehensive overview of theory and architectures

NN Anandakumar, MS Hashmi, M Tehranipoor - Integration, 2021 - Elsevier
Abstract Physically Unclonable Functions (PUFs) are a promising technology and have
been proposed as central building blocks in many cryptographic protocols and security …

PUF-based secure chaotic random number generator design methodology

S Kalanadhabhatta, D Kumar… - IEEE transactions on …, 2020 - ieeexplore.ieee.org
Pseudorandom number generators (PRNGs) play a pivotal role in generating key
sequences of cryptographic protocols. Among different schemes, a simple chaotic PRNG …

Design and analysis of FPGA-based PUFs with enhanced performance for hardware-oriented security

NN Anandakumar, MS Hashmi… - ACM Journal on Emerging …, 2022 - dl.acm.org
This article presents a thorough analysis of two distinct Physically Unclonable Functions
(PUF), namely RO-PUF (Ring oscillator-based PUF) and RS-LPUF (RS Latch-based PUF) …

High-rate secret key generation using physical layer security and physical unclonable functions

T Assaf, A Al-Dweik, Y Iraqi, S Jangsher… - IEEE Open Journal …, 2023 - ieeexplore.ieee.org
Physical layer security (PLS) can be adopted for efficient key generation and sharing in
secured wireless systems. The inherent random nature of the wireless channel and the …

Negative capacitance FETs for energy efficient and hardware secure logic designs

RC Bheemana, A Japa, SS Yellampalli, R Vaddi - Microelectronics Journal, 2022 - Elsevier
Negative capacitance field effect transistors (NCFETs) have attracted good attention for
energy efficient circuit designs. However, there are no clear design insights with NCFET …

A fully configurable PUF using dynamic variations of resistive crossbar arrays

J Li, Y Cui, C Wang, C Gu, W Liu - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
A resistive random access memory (RRAM) as an emerging nanoelectronic device, is widely
used for memory and physical unclonable function (PUF) applications. The compatibility of …

An efficient ring oscillator PUF using programmable delay units on FPGA

Y Cui, J Li, Y Chen, C Wang, C Gu, M O'neill… - ACM Transactions on …, 2023 - dl.acm.org
The ring oscillator (RO) PUF can be implemented on different FPGA platforms with high
uniqueness and reliability. To decrease the hardware cost of conventional RO PUFs, a new …

An efficient design of Anderson PUF by utilization of the Xilinx primitives in the SLICEM

A Lotfy, M Kaveh, D Martín, MR Mosavi - IEEE Access, 2021 - ieeexplore.ieee.org
Physical unclonable functions (PUFs) are known as one of the most recent promising
technologies for cryptographic key generation. A PUF circuit is designed in such a way to …

[HTML][HTML] FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

K Lata, LR Cenkeramaddi - Cryptography, 2023 - mdpi.com
Field-programmable gate arrays (FPGAs) have firmly established themselves as dynamic
platforms for the implementation of physical unclonable functions (PUFs). Their intrinsic …