Stack filter: Reducing L1 data cache power consumption
The L1 data cache is one of the most frequently accessed structures in the processor.
Because of this and its moderate size it is a major consumer of power. In order to reduce its …
Because of this and its moderate size it is a major consumer of power. In order to reduce its …
Revisiting stack caches for energy efficiency
With the growing focus on energy efficiency, it is important to find ways to reduce energy
without sacrificing performance. The L1 data cache is a significant contributor to processor …
without sacrificing performance. The L1 data cache is a significant contributor to processor …
Methods and apparatus for soft-partitioning of a data cache for stack data
A method of partitioning a data cache comprising a plurality of sets, the plurality of sets
comprising a plurality of ways, is provided. Responsive to a stack data request, the method …
comprising a plurality of ways, is provided. Responsive to a stack data request, the method …
Methods and apparatus for data cache way prediction based on classification as stack data
ABSTRACT A method of way prediction for a data cache having a plurality of ways is
provided. Responsive to an instruction to access a stack data block, the method accesses …
provided. Responsive to an instruction to access a stack data block, the method accesses …
Time-predictable Stack Caching
S Abbaspourseyedi - 2016 - orbit.dtu.dk
Embedded systems are computing systems for controlling and interacting with physical
environments. Embedded systems with special timing constraints where the system needs to …
environments. Embedded systems with special timing constraints where the system needs to …
Stack cache management and coherence techniques
LE Olson, Y Eckert, BM Beckmann - US Patent 9,189,399, 2015 - Google Patents
(57) ABSTRACT Related US Application Data A processor System presented here has a
plurality of execu (60) Provisional application No. 61/728,843, filed on Nov. t1On COres and …
plurality of execu (60) Provisional application No. 61/728,843, filed on Nov. t1On COres and …
[PDF][PDF] Gestión de los accesos a memoria en sistemas de altas prestaciones.
R González Alberquilla - 2013 - docta.ucm.es
The memory subsystem is one of the three main components of a computer, along with the
CPU and the I/O. As such, it is determinant in the performance, power consumption …
CPU and the I/O. As such, it is determinant in the performance, power consumption …