Future microprocessors may become so power constrained that not all transistors will be
able to be powered on at once. These systems will be required to nimbly adapt to changes …

The problem of motion estimation and restoration of objects in a blurred video sequence is
addressed in this paper. Fast movement of the objects, together with the aperture time of the …

Multi-tenancy for latency-critical applications leads to resource interference and
unpredictable performance. Core reconfiguration opens up more opportunities for …

Power management through dynamic voltage and frequency scaling (DVFS) is one of the
most widely adopted techniques. However, it impacts application reliability (due to soft …

On-chip power-management techniques have evolved over several processor generations.
However, response time and scalability constraints have made it difficult to translate existing …

Data centers in cloud environment consume high amount of energy which not only raises
the electricity bills of the data center hosting organizations but also has the strong …

Defining a processor micro-architecture for a targeted productspace involves multi-
dimensional optimization across performance, power and reliability axes. A key decision in …

Future servers will incorporate many active low-power modes for different system
components, such as cores and memory. Though these modes provide flexibility for power …

Energy efficient voltage scheduling for multi-core processors is an important issue in the
context of parallel and distributed computing. Dynamic voltage scaling (DVS) is used to …

3-D integration is a new technology that overcomes the limitations of 2-D integrated circuits,
eg, power and delay induced from long interconnect wires, by stacking multiple dies to …