The cetus source-to-source compiler infrastructure: overview and evaluation

H Bae, D Mustafa, JW Lee, Aurangzeb, H Lin… - International Journal of …, 2013 - Springer
This paper provides an overview and an evaluation of the Cetus source-to-source compiler
infrastructure. The original goal of the Cetus project was to create an easy-to-use compiler …

Analyzing and detecting review spam

N Jindal, B Liu - Seventh IEEE international conference on data …, 2007 - ieeexplore.ieee.org
Mining of opinions from product reviews, forum posts and blogs is an important research
topic with many applications. However, existing research has been focused on extraction …

[图书][B] Modern compiler design

D Grune, K Van Reeuwijk, HE Bal, CJH Jacobs… - 2012 - books.google.com
" Modern Compiler Design" makes the topic of compiler design more accessible by focusing
on principles and techniques of wide application. By carefully distinguishing between the …

Cetus: A source-to-source compiler infrastructure for multicores

C Dave, H Bae, SJ Min, S Lee, R Eigenmann… - Computer, 2009 - ieeexplore.ieee.org
The Cetus tool provides an infrastructure for research on multicore compiler optimizations
that emphasizes automatic parallelization. The compiler infrastructure, which targets C …

Semi-automatic composition of loop transformations for deep parallelism and memory hierarchies

S Girbal, N Vasilache, C Bastoul, A Cohen… - International Journal of …, 2006 - Springer
Modern compilers are responsible for translating the idealistic operational semantics of the
source program into a form that makes efficient use of a highly complex heterogeneous …

A chip-multiprocessor architecture with speculative multithreading

V Krishnan, J Torrellas - IEEE Transactions on Computers, 1999 - ieeexplore.ieee.org
Much emphasis is now being placed on chip-multiprocessor (CMP) architectures for
exploiting thread-level parallelism in applications. In such architectures, speculation may be …

Mapping irregular applications to DIVA, a PIM-based data-intensive architecture

M Hall, P Kogge, J Koller, P Diniz, J Chame… - Proceedings of the …, 1999 - dl.acm.org
Abstract Processing-in-memory (PIM) chips that integrate processor logic into memory
devices offer a new opportunity for bridging the growing gap between processor and …

Estimating cache misses and locality using stack distances

C CaΒcaval, DA Padua - Proceedings of the 17th annual international …, 2003 - dl.acm.org
Cache behavior modeling is an important part of modern optimizing compilers. In this paper
we present a method to estimate the number of cache misses, at compile time, using a …

Speculative synchronization: Applying thread-level speculation to explicitly parallel applications

JF Martinez, J Torrellas - ACM SIGOPS Operating Systems Review, 2002 - dl.acm.org
Barriers, locks, and flags are synchronizing operations widely used programmers and
parallelizing compilers to produce race-free parallel programs. Often times, these operations …

Putting polyhedral loop transformations to work

C Bastoul, A Cohen, S Girbal, S Sharma… - … and Compilers for …, 2004 - Springer
We seek to extend the scope and efficiency of iterative compilation techniques by searching
not only for program transformation parameters but for the most appropriate transformations …