Radiation effects in a post-Moore world

DM Fleetwood - IEEE Transactions on Nuclear Science, 2021 - ieeexplore.ieee.org
An overview is presented of the significant influences of Moore's Law scaling on radiation
effects on microelectronics, focusing on historical trends and future needs. A number of …

Soft error effects on arm microprocessors: Early estimations versus chip measurements

PR Bodmann, G Papadimitriou… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Extensive research efforts are being carried out to evaluate and improve the reliability of
computing devices either through beam experiments or simulation-based fault injection …

Evaluating soft core RISC-V processor in SRAM-based FPGA under radiation effects

AB de Oliveira, LA Tambara… - … on Nuclear Science, 2020 - ieeexplore.ieee.org
This article evaluates the RISC-V Rocket processor embedded in a Commercial Off-The-
Shelf (COTS) SRAM-based field-programmable gate array (FPGA) under heavy-ions …

A low-cost fault-tolerant RISC-V processor for space systems

DA Santos, LM Luza, CA Zeferino… - 2020 15th Design & …, 2020 - ieeexplore.ieee.org
Embedded processors have been used in a diversity of applications, such as consumer
electronics, home appliances, and automation systems. Another area that embedded …

Experimental and analytical study of xeon phi reliability

D Oliveira, L Pilla, N DeBardeleben… - Proceedings of the …, 2017 - dl.acm.org
We present an in-depth analysis of transient faults effects on HPC applications in Intel Xeon
Phi processors based on radiation experiments and high-level fault injection. Besides …

Lockstep dual-core ARM A9: Implementation and resilience analysis under heavy ion-induced soft errors

ÁB de Oliveira, GS Rodrigues… - … on Nuclear Science, 2018 - ieeexplore.ieee.org
This paper presents a dual-core lockstep (DCLS) implementation to protect hard-core
processors against radiation-induced soft errors. The proposed DCLS is applied to an …

Ultrahigh energy heavy ion test beam on Xilinx Kintex-7 SRAM-based FPGA

B Du, L Sterpone, S Azimi… - … on Nuclear Science, 2019 - ieeexplore.ieee.org
In recent years, field-programmable gate array (FPGA) devices have attracted a lot of
attentions due to the increasing performance they provide thanks to technology scaling …

Reliability analysis of a fault-tolerant RISC-V system-on-chip

DA Santos, LM Luza, L Dilillo, CA Zeferino… - Microelectronics …, 2021 - Elsevier
The space environment's hostility requires that the processors used in spacecraft be
designed using fault tolerance techniques to reduce the propagation of errors. In this …

Enhancing fault awareness and reliability of a fault-tolerant RISC-V system-on-chip

DA Santos, AMP Mattos, DR Melo, L Dilillo - Electronics, 2023 - mdpi.com
Recent research has shown interest in adopting the RISC-V processors for high-reliability
electronics, such as aerospace applications. The openness of this architecture enables the …

Partial TMR in FPGAs using approximate logic circuits

AJ Sánchez-Clemente, L Entrena… - … on Nuclear Science, 2016 - ieeexplore.ieee.org
TMR is a very effective technique to mitigate SEU effects in FPGAs, but it is often expensive
in terms of FPGA resource utilization and power consumption. For certain applications …