Incremental modification and optimization in VLSI Computer-Aided Design (CAD) is of
fundamental importance. However, it has not been investigated as a discipline. Previous …

In this paper we survey major problems faced by EDA tools in tackling deep submicron
(DSM) design challenges like: crosstalk, reliability, power and interconnect dominated delay …

Although resistance monitoring write termination (RM-WT) scheme for STT-MRAM can
reduce the write energy, the degradation of read margin due to low tunnel …

In this work, we have proposed and experimentally demonstrated a true full-duplex input–
output (TFD-IO) for high-speed high-density interfaces. The proposed TFD-IO can be used …

The aim of this paper is to present a new and original method for on‐chip measurements of
very high frequency parasitic signals where a sampling circuit is directly included in the test …

As technology scales into the deep submicron regime, capacitive coupling between signal
lines becomes a dominant problem. Capacitive coupling is more acute for domino logic …

A TEM cell configuration is used to measure the emission effect of an active EMC test chip or
of tracks connected to it. A number of parameters have a clear influence on the emission …

This paper describes a specific technique for measuring and characterizing the time-domain
aspect of the crosstalk effect based on a sampling technique. It includes the description of …

This paper presents an approach for measuring crosstalk interference in digital CMOS VLSI
circuits. The crosstalk sensor has been implemented in 0.8/spl mu/m AMS (Austria Mikro …

In this work, we introduce the concept of true full-duplexing (TFD) for high-speed
interconnects. Full-duplex transceivers at the two ends of an interconnect can support …