This tutorial surveys design methods for energy-efficient system-level design. We consider
electronic sytems consisting of a hardware platform and software layers. We consider the …

Power dissipation and thermal issues are increasingly significant in modern processors. As
a result, it is crucial that power/performance tradeoffs be made more visible to chip architects …

We present Orion, a power-performance interconnection network simulator that is capable of
providing detailed power characteristics, in addition to performance characteristics, to …

Power concerns are becoming increasingly pressing in highperformance processors.
Building power-aware and even power-adaptive computer architectures requires being able …

As interconnection networks proliferate to many new applications, a low-latency high-
throughput fabric no longer suffices. An architectural-level power model for interconnection …

Dataflow process networks (DPNs) provide a convenient model of computation that is often
used to model system behavior in model-based designs. With fixed sets of nodes, they are …

Multiported register files are a critical component of high-performance superscalar
microprocessors. Conventional multiported structures can consume significant power and …

In recent years, reducing power has become an important design goal for high-performance
microprocessors. This work attempts to bring the power issue to the earliest phases of …

Dedicating more silicon area to single thread performance will necessarily be considered as
worthwhile in future-potentially heterogeneous-multicores. In particular, Value prediction …

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for
analysis, characterization, estimation, and optimization of the various forms of power …