The impact of fin number on device performance and reliability for multi-fin tri-gate n-and p-type FinFET
WK Yeh, W Zhang, PY Chen… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
In this paper, the effect of carrier quantization on device characteristics and stress-induced
device degradation for multifin high-κ/metal tri-gate n-type and p-type fin field-effect …
device degradation for multifin high-κ/metal tri-gate n-type and p-type fin field-effect …
Reliability challenges for the 10nm node and beyond
Technology elements for the 10nm node and beyond include FINFETs on bulk or SOI,
replacement gate process, multi-workfunction gate stacks, self-aligned contacts, and …
replacement gate process, multi-workfunction gate stacks, self-aligned contacts, and …
Bias temperature instability reliability in stacked gate-all-around nanosheet transistor
M Wang, J Zhang, H Zhou… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
In this paper, we report the bias temperature instability (BTI) reliability in stacked gate-all-
around (GAA) nanosheet (NS) devices. We show that, in addition to its superior intrinsic …
around (GAA) nanosheet (NS) devices. We show that, in addition to its superior intrinsic …
A comparative study of lifetime reliability of planar MOSFET and FinFET due to BTI for the 16 nm CMOS technology node based on reaction-diffusion model
MM Mahmoud, N Soin - Microelectronics reliability, 2019 - Elsevier
Abstract Intensive scaling of Integrated Circuits is a crucial factor for achieving high
performance and astronomical packing density. However, this scaling is pushing planar …
performance and astronomical packing density. However, this scaling is pushing planar …
Transistor reliability variation correlation to threshold voltage
MOSFET reliability data are often represented as a function of gate overdrive (V GV T) with
the implicit assumption that overdrive is the appropriate normalizing parameter. While this …
the implicit assumption that overdrive is the appropriate normalizing parameter. While this …
Process optimizations for NBTI/PBTI for future replacement metal gate technologies
Bias Temperature Instability (BTI) is a tremendous reliability concern for deeply scaled
CMOS technologies, and is the limiting mechanism for further inversion layer thickness …
CMOS technologies, and is the limiting mechanism for further inversion layer thickness …
Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET
A fast two-point measurement methodology, applicable to nano-scale devices, is introduced
to separate electron trapping (Not, e) from interface state contributions (Nit) in hot carrier …
to separate electron trapping (Not, e) from interface state contributions (Nit) in hot carrier …
Circuit relevant HCS lifetime assessments at single transistors with emulated variable loads
C Schlünder, F Proebster, J Berthold… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
Hot carrier induced degradation of MOSFETs is still a concern for circuit reliability and not
yet fully understood [1-4]. On the one hand stress measurements at single devices reveal …
yet fully understood [1-4]. On the one hand stress measurements at single devices reveal …
Cap layer and multi-work-function tuning impact on TDDB/BTI in SOI FinFET devices
W Liu, A Kerber, F Guarin… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Threshold voltage Vt tunability has been demonstrated for a 14nm SOI FinFET technology
with multi-work-function tuning and cap layer incorporated high-k dielectric. BTI degradation …
with multi-work-function tuning and cap layer incorporated high-k dielectric. BTI degradation …
Technology scaling implications for BTI reliability
BTI has long been a concern for transistor reliability, and as such garnered significant
attention for process optimization and qualification. Typically, the details of a given …
attention for process optimization and qualification. Typically, the details of a given …