A processor. In some embodiments, the processor includes: a first tile, the first tile being
configured: to feed a first nibble from a third queue, through a first shuffler, to a first multi …

US11664819B2 - Homogenizing data sparsity using a butterfly multiplexer - Google Patents
US11664819B2 - Homogenizing data sparsity using a butterfly multiplexer - Google Patents …

A method for performing a convolution operation includes storing, a convolution kernel in a
first storage device, the convolution kernel having dimensions x by y; storing, in a second …

A neural processor. In some embodiments, the processor includes a first tile, a second tile, a
memory, and a bus. The bus may be connected to the memory, the first tile, and the second …

A neural processor. In some embodiments, the processor includes a first tile, a second tile, a
memory, and a bus. The bus may be connected to the memory, the first tile, and the second …

US20240036763A1 - Methods, apparatus, and articles of manufacture to increase data reuse
for multiply and accumulate (mac) operations - Google Patents US20240036763A1 - Methods …

A multichannel data packer includes a plurality of two-input multiplexers and a controller.
The plurality of two-input multiplexers is arranged in 2 N rows and N columns in which N is …

An image recognition method includes a feature amount extracting step of generating, from
an input image, a base feature map group including a plurality of base feature maps; an …

US11663471B2 - Compute-in-memory deep neural network inference engine using low-rank
approximation technique - Google Patents US11663471B2 - Compute-in-memory deep neural …

A data compressor a zero-value remover, a zero bit mask generator, a non-zero values
packer, and a row-pointer generator. The zero-value remover receives 2 N bit streams of …