KY Ahn, L Forbes - US Patent 7,192,824, 2007 - Google Patents
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KY Ahn, L Forbes - US Patent 7,192,892, 2007 - Google Patents
PREPARE SUBSTRATE attainable using SiO. Depositing a hafnium metal layer on a Substrate Surface by atomic layer deposition and depositing a hafnium oxide layer on the …
KY Ahn, L Forbes - US Patent 7,312,494, 2007 - Google Patents
Dielectric layers containing a hafnium oxide hafnium oxide layer arranged as one or more monolayers and a lanthanide oxide layer and a method of fabricating Such a dielectric layer …
KY Ahn - US Patent 6,852,167, 2005 - Google Patents
Integrated circuits, the key components in thousands of electronic and computer products, are generally built layer by layer on a silicon substrate. One common technique for forming …
JW McPherson, J Kim, A Shanware… - IEEE transactions on …, 2003 - ieeexplore.ieee.org
The ultimate breakdown strength E/sub bd/of a dielectric material is found to decrease as the dielectric-constant k increases. A thermochemical description of the ultimate breakdown …
WJ Zhu, TP Ma, T Tamagawa, J Kim… - IEEE Electron Device …, 2002 - ieeexplore.ieee.org
Based on the experimental results of the temperature dependence of gate leakage current and Fowler-Nordheim tunneling characteristics at 77 K, we have extracted the energy band …
YC Yeo, TJ King, C Hu - IEEE Transactions on Electron …, 2003 - ieeexplore.ieee.org
In this paper, we explore the scaling limits of alternative gate dielectrics based on their direct- tunneling characteristics and gate-leakage requirements for future CMOS technology …
CC Hobbs, LRC Fonseca, A Knizhnik… - … on Electron Devices, 2004 - ieeexplore.ieee.org
We report here that Fermi pinning at the polysilicon/metal-oxide interface causes high threshold voltages in MOSFET devices. In Part I, we investigated the different gatestack …