Reliability exploration of system-on-chip with multi-bit-width accelerator for multi-precision deep neural networks

Q Cheng, M Huang, C Man, A Shen… - … on Circuits and …, 2023 - ieeexplore.ieee.org
Deep neural networks (DNNs) in safety-critical applications demand high reliability even
when running on edge-computing devices. Recent works on System-on-Chip (SoC) design …

Memristor-Based Approximate Query Architecture for In-Memory Hyperdimensional Computing

T Yu, B Wu, K Chen, G Zhang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
As a new computing paradigm, hyperdimensional computing (HDC) has gradually
manifested its advantages in edge-side intelligent applications by virtue of its interpretability …

Fully Learnable Hyperdimensional Computing Framework with Ultra-tiny Accelerator for Edge-side Applications

T Yu, B Wu, K Chen, G Zhang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Brain-inspired hyperdimensional computing (HDC) is a new computational paradigm that
encodes input sample into a hypervector (generally with dimensions of), and performs …

AttnACQ: Attentioned-AutoCorrelation Based Query for Hyperdimensional Associative Memory

T Yu, B Wu, K Chen, G Zhang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
The low power and latency of hyperdimensional associative memory (HAM) promotes
hyperdimensional computing (HDC)'s efficiency. However, overheads of HAM can be hardly …