Approximate logic synthesis for FPGA by wire removal and local function change

Y Wu, C Shen, Y Jia, W Qian - 2017 22nd Asia and South …, 2017 - ieeexplore.ieee.org
Approximate computing is a new design paradigm targeting at error-tolerant applications. By
allowing a little amount of inaccuracy in the computation, it could significantly reduce circuit …

A novel heuristic search method for two-level approximate logic synthesis

S Su, C Zou, W Kong, J Han… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Recently, much attention has been paid to approximate computing, a novel design paradigm
for error-tolerant applications. It can significantly reduce area, power, and delay of circuits by …

Systematic synthesis of approximate adders and multipliers with accurate error calculations

ME Nojehdeh, M Altun - Integration, 2020 - Elsevier
In this study, we perform logic synthesis and area optimization of approximate ripple-carry
adders and Wallace-tree multipliers with a given error constraint. We first implement …

A two-level approximate logic synthesis combining cube insertion and removal

G Ammes, WL Neto, P Butzen… - … on Computer-Aided …, 2022 - ieeexplore.ieee.org
Approximate computing is an attractive paradigm for reducing the design complexity of error-
resilient systems, therefore, improving performance and saving power consumption. In this …

Approximate disjoint bi-decomposition and its application to approximate logic synthesis

Y Yao, S Huang, C Wang, Y Wu… - 2017 IEEE International …, 2017 - ieeexplore.ieee.org
Approximate computing is an emerging design paradigm targeting at error-tolerant
applications. The area, delay, and power consumption of a circuit can be improved by …

Two-Level and Multilevel Approximate Logic Synthesis

G Ammes, PF Butzen, AI Reis, R Ribas - Journal of Integrated Circuits and …, 2022 - jics.org.br
Approximate computing represents a modern design paradigm that allows systems to have
imprecise or inexact execution, aiming to optimize circuit area, performance, and power …

Power optimization for FPRM logic using approximate computing technique

Y Wang, L Wang - 2019 IEEE 13th International Conference on …, 2019 - ieeexplore.ieee.org
A power optimization algorithm based on approximate computing technique was proposed
for FPRM logic circuits. The algorithm includes FPRM logic circuits dynamic power …

Data-Driven Feature Selection Framework for Approximate Circuit Design

B Zhao, L Qiu, Y Lao - … on Computer-Aided Design of Integrated …, 2023 - ieeexplore.ieee.org
The ever-growing data scale and computation complexity raise tremendous concerns about
computer systems' efficiency (ie, lower hardware overhead and power consumption) …

[PDF][PDF] On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks

JA Echavarria Gutiérrez - 2022 - opus4.kobv.de
Approximate computing exploits perceptual inaccuracies of the human senses, error-
resilient applications, and noisy input data to produce more power-efficient architectures …

On the Approximation of Arithmetic Functions and Logic Synthesis of Approximate Very Large Boolean Networks

JAE Gutiérrez - 2022 - search.proquest.com
Approximate computing exploits perceptual inaccuracies of the human senses, error-
resilient applications, and noisy input data to produce more power-efficient architectures …