Abstract Cyber–Physical systems (CPS), combining continuous physical behavior and
discrete control behavior, have been widely utilized in recent years. However, the traditional …

Verilog is a hardware description language (HDL) that has become an industry-standard
HDL of IEEE. Multithreaded discrete event simulation language (MDESL) is a Verilog-like …

The hardware description language Verilog has been standardized and widely used in
industry. Multithreaded Discrete Event Simulation Language (MDESL) is a Verilog-like …

This paper provides an overview of Jifeng He's academic achievements while at Oxford
University in the UK, and later in Macau and Shanghai, together with his legacy …

Event-B is a formal method that utilizes a stepwise development approach for system-level
modeling and analysis. We are interested in reasoning about real-time deadlines and …

Hardware architectures like x86 and ARM provide relaxed memory models for efficiency
reasons. The revised ARMv8 architecture is multi-copy atomic (MCA), which brings relaxed …

Modern multiprocessors deploy a variety of weak memory models (WMMs). Total Store
Order (TSO) is a widely-used weak memory model in SPARC implementations and x86 …

Hardware architectures like x86 and ARM provide relaxed memory models for efficiency
reasons. The revised ARMv8 architecture is multi-copy atomic (MCA), which brings relaxed …

This paper describes work done using formal methods to verify parts of the RTEMS real-time
operating system, as part of an activity sponsored by the European Space Agency to qualify …

A personal archive of material related to formal methods has been deposited at Swansea
University by the author in 2018. This paper documents the contents of the archive and …