Address learning and aging for network bridging in a network processor

RJ Munoz, JA Manzella, Z Guo, WA Roper - US Patent 9,727,508, 2017 - Google Patents
If the destination address is stored in a memory of an I/O adapter, the received data packet is
processed in accordance with bridging rules associated with each destination address …

Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processors

D Mital, MR Hakami, W Burroughs - US Patent 8,515,965, 2013 - Google Patents
Described embodiments process hash operation requests of a network processor. A hash
processor determines a job identifier, a corresponding hash table, and a setting of a …

Task backpressure and deletion in a multi-flow network processor architecture

D Mital, W Burroughs, MR Betker - US Patent 8,910,168, 2014 - Google Patents
Described embodiments generate tasks corresponding to packets received by a network
processor. A source processing module sends task messages including a task identi? er …

Task queuing in a network communications processor architecture

DP Sonnier, B Sundararaman, S Aulakh… - US Patent …, 2013 - Google Patents
US8407707B2 - Task queuing in a network communications processor architecture - Google
Patents US8407707B2 - Task queuing in a network communications processor architecture …

Data caching in a network communications processor architecture

DP Sonnier, DA Brown, CE Peet Jr - US Patent 9,218,290, 2015 - Google Patents
Described embodiments provide for storing data in a local cache of one of a plurality of
processing modules of a network processor. A control processing module determines …

Processor bus bridge security feature for network processors or the like

RJ Byrne, DS Masters - US Patent 8,489,791, 2013 - Google Patents
Provisional application No. 61/313,196, filed on Mar.(60) Type applicauon No CO. O. Va.
Described embodiments provide a system having a bridge for s communicating information …

Data caching in a network communications processor architecture

DP Sonnier, DA Brown, CE Peet Jr - US Patent 9,183,145, 2015 - Google Patents
Described embodiments provide a method of coherently storing data in a network processor
having a plurality of processing modules and a shared memory. A control processor sends …

Reducing data read latency in a network communications processor architecture

S Pollock, W Burroughs, D Mital, N Vangati… - US Patent …, 2013 - Google Patents
Described embodiments provide address translation for data stored in at least one shared
memory of a network processor. A processing module of the network processor generates …

Memory manager for a network communications processor architecture

J Hasting, D Mital - US Patent 8,499,137, 2013 - Google Patents
Related US Application Data Continuation-in-part of application No. 12/782.379, filed on
May 18, 2010, and a continuation-in-part of application No. 12/782,393, filed on May 18 …

Hash processing in a network communications processor architecture

W Burroughs, D Mital, MR Hakami - US Patent 8,321,385, 2012 - Google Patents
Described embodiments provide coherent processing of hash operations of a network
processor having a plurality of pro cessing modules. A hash processor of the network …