This paper presents a low-power direct digital frequency synthesizer (DDFS) based on a
hybrid design with a maximum operating frequency of 1.3 GHz. The proposed hybrid design …

The use of the multipartite table methods (MTMs) to implement high-performance direct
digital frequency synthesizers (DDFSs) is investigated in this paper. A closed-form …

This paper introduces a novel direct digital frequency synthesizer (DDFS) with an
architecture based on the quasi-linear interpolation method (QLIP). The QLIP method is a …

The paper presents a detailed description of a direct digital frequency synthesizer (DDFS)
based on a Multipartite Table Method (MTM) which is a salient lookup table compression …

This paper investigates a novel direct digital frequency synthesizer architecture, based on
piecewise linear approximation with segments of nonuniform length. The new approach …

This paper presents a detailed description of direct digital frequency synthesizers (DDFS)
using an optimized piecewise linear approximation for phase to sine mapping, named dual …

In this paper, a universal mathematical method is proposed to determine the upperbound of
the spurious-free dynamic range (SFDR) in direct digital frequency synthesizers (DDFSs) …

Abstract The Direct Digital Frequency Synthesizer (DDFS) is a critical component routinely
implemented in communication or signal processing systems. The recent literature proposes …

In this paper an efficient approach is presented to design and implement Direct Digital
Frequency Synthesizer (DDFS) with high speed and spectral purity for wireless applications …

A single-chip direct digital frequency synthesizer with hardware efficient phase-to-amplitude
mapping and an integrated DAC achieves over 50dB SFDR in full-Nyquist band at 1.7 GHz …