Compact and programmable yet high-performance SoC architecture for cryptographic pairings
M Bahadori, K Järvinen - 2020 30th International Conference …, 2020 - ieeexplore.ieee.org
Cryptographic pairings are important primitives for many advanced cryptosystems. Efficient
computation of pairings requires the use of several layers of algorithms as well as …
computation of pairings requires the use of several layers of algorithms as well as …
High-Throughput Bilinear Pairing Processor for Server-Side FPGA Applications
J Sakamoto, D Fujimoto, R Anzai… - … Transactions on Very …, 2024 - ieeexplore.ieee.org
This study focuses on the acceleration of cryptographic pairing operations on field-
programmable gate arrays (FPGAs) for server-side applications. Previous studies on FPGA …
programmable gate arrays (FPGAs) for server-side applications. Previous studies on FPGA …
ハードウェアセキュリティの最新動向: 2. ハードウェアを用いた暗号処理の高速化
坂本純一， 吉田直樹 - 情報処理, 2020 - ipsj.ixsq.nii.ac.jp
論文抄録 すべての “モノ” がインターネットに接続される IoT (Internet of Things) 時代には,
膨大な数のユーザそれぞれのニーズに合わせた “機能” を持った暗号技術が求められている …
膨大な数のユーザそれぞれのニーズに合わせた “機能” を持った暗号技術が求められている …