High-level synthesis (HLS) has been widely adopted as it significantly improves the
hardware design productivity and enables efficient design space exploration (DSE). Existing …

With an explosive growth of various neural network algorithms, their high performance
implementations on hardware platforms, such as GPUs and FPGAs, are becoming critical as …

This work is an introduction and a survey for the Special Issue on Machine Intelligence at the
Edge. The authors argue that workloads that were formerly performed in the cloud are …

FPGAs have been rapidly adopted for acceleration of Deep Neural Networks (DNNs) with
improved latency and energy efficiency compared to CPU and GPU-based implementations …

With the prevalence of hardware accelerators as an integral part of the modern systems on
chip (SoCs), the ability to quickly and accurately model accelerators within the system it …

Dataflow architectures are growing in popularity due to their potential to mitigate the
challenges posed by the memory wall inherent to the Von Neumann architecture. At the …

In hardware/software (HW/SW) co-design, hardware/software partitioning is an essential
step in that it determines which components to be implemented in hardware and which ones …

In electronic design automation, hardware/software co-design significantly reduces the time-
to-market and improves the performance of embedded systems. With the increasing scale of …

This paper proposes a High-Level Synthesis (HLS) framework for domain-specific
computing. The framework contains three key components: 1) ScaleHLS, a multi-level HLS …

Post-Moore's law area-constrained systems rely on accelerators to deliver performance
enhancements. Coarse-grained accelerators can offer substantial domain acceleration, but …