A Novel T-shape channel with an inverted-T nano-cavity Label-free detection using Si:HfO2 ferroelectric DGDM-JLTFET as a biosensor---A Simulation Study

RA Kumar, GS Kondavitee, G Wadhwa… - IEEE Sensors …, 2024 - ieeexplore.ieee.org
In this article, we present and simulate a very sensitive label-free biosensor that uses Si:
HfO2 ferroelectric (FE) junction less tunnel field-effect transistor (FE-JL-TFET) …

Dielectric/charge density modulated junctionless FET based label-free biosensor

KN Priyadarshani, S Singh, MKA Mohammed - Inorganic Chemistry …, 2023 - Elsevier
In this research article, a junctionless FET is reported to be deployed as a biosensor for the
label-free electrical detection of biomolecules with the help of modulation of dielectric …

Comprehensive study of gate induced drain leakage in nanowire and nanotube junctionless FETs using Si1-xGex source/drain

A Thakur, R Dhiman - AEU-International Journal of Electronics and …, 2023 - Elsevier
We present, in this paper, optimized nanotube (NT) and nanowire (NW) junctionless field-
effect transistor (JLFET) architectures of gate-induced drain leakage (GIDL). At the …

Comparative Analysis of Symmetrical/Asymmetrical Vertical Electrolyte‐Insulated Semiconductor Tunnel FET for pH Sensor Application

AKS Pundir, G Wadhwa, P Kaur, P Mani… - … status solidi (a), 2024 - Wiley Online Library
This study investigates symmetrical/asymmetrical vertical electrolyte‐insulated
semiconductor Tunnel field effect transistors (TFETs)(SV‐EIS‐TFET/ASV‐EIS‐TFET) for their …

A physics-based drain current model for Si1-xGex source/drain NT JLFET for enhanced hot carrier reliability with temperature measurement

A Thakur, R Dhiman - Microelectronics Journal, 2022 - Elsevier
In this paper, we report, the hot carrier reliability issue in the Si 1-x Ge x source/drain
nanotube (NT) junctionless field-effect transistor (JLFET) with temperature variations. The …

Impacts of core gate thickness and Ge content variation on the performance of Si1−xGex source/drain Si–nanotube JLFET

A Thakur, R Dhiman - Journal of Computational Electronics, 2021 - Springer
In this paper, we investigate the impacts of variation in the core gate thickness and
germanium content on the performance of a Si 1− x Ge x source/drain Si-nanotube …

Effect of ITC on Boolean functionality of n-type heterojunction vertical TFETs

V Ambekar, M Panchore - Microelectronics Journal, 2023 - Elsevier
The objective of this paper is to investigate the effect of interface trap charges (ITC) on
Boolean functionality of n-type vertical TFET structure with and without gate overlap (HJ …

[HTML][HTML] Triple and quadruple metal gate work function engineering to improve the performance of junctionless double surrounding gate In0. 53Ga0. 47As nanotube …

V Kumar, A Vohra - Physics Letters A, 2024 - Elsevier
In line with Moore's Law and the International Roadmap for Devices and Systems (IDRS),
shrinking MOSFET dimensions to the 3 nm technology node requires the introduction and …

An analytical model for P+ pocket SiC gate all around Junctionless field effect transistor with impact of high temperature

N Yarlagadda, YK Verma - Micro and Nanostructures, 2023 - Elsevier
In this article, we examined the influence of temperature in P+ pocket silicon carbide (SiC)
gate all around junctionless field effect transistor (GAA JLFET). The inclusion of P+ pocket …

Design and Analysis of a GaSb Heterojuncton Vertical TFET with Source Pocket for Work Function Engineering and Improved Analog Performance

G Wadhwa, N Srivastava… - 2024 IEEE 3rd …, 2024 - ieeexplore.ieee.org
To provide a highly efficient device, this article presents a vertical GaSb tunnel field effect
transistor (Hetero-VTFET) both with and without a source pocket in order to achieve the …