Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints
YH Chen, JY Chen, JD Huang - ACM Journal on Emerging …, 2016 - dl.acm.org
Power dissipation has become a pressing issue of concern in the designs of most electronic
system as fabrication processes enter even deeper submicron regions. More specifically …
system as fabrication processes enter even deeper submicron regions. More specifically …
A reconfigurable low-power BDD logic architecture using ferroelectric single-electron transistors
This paper presents ferroelectric single-electron transistors (SETs) with tunable tunnel
barriers and their application in a reconfigurable binary decision diagram (BDD) logic …
barriers and their application in a reconfigurable binary decision diagram (BDD) logic …
Diagnosis and synthesis for defective reconfigurable single-electron transistor arrays
CY Huang, YJ Li, CW Liu, CY Wang… - IEEE transactions on …, 2016 - ieeexplore.ieee.org
Single-electron transistor (SET) at room temperature has been demonstrated as a promising
device for extending Moore's law due to its ultralow power consumption. However, early …
device for extending Moore's law due to its ultralow power consumption. However, early …
A defect-aware approach for mapping reconfigurable single-electron transistor arrays
Single-Electron Transistor (SET) at room temperature has been demonstrated as a
promising device for extending Moore's law due to its ultra low power consumption …
promising device for extending Moore's law due to its ultra low power consumption …
Characteristics of Energy in the Coulomb Island of Single Electron Transistor
In the age of silicon technology consumption of low power is a primary challenge due to its
practical necessity. For meeting this criterion in design protocol, extensive usage of …
practical necessity. For meeting this criterion in design protocol, extensive usage of …
Area-aware decomposition for single-electron transistor arrays
Single-electron transistor (SET) at room temperature has been demonstrated as a promising
device for extending Moore's law due to its ultra-low power consumption. Existing SET …
device for extending Moore's law due to its ultra-low power consumption. Existing SET …
ROBDD-based area minimization synthesis for reconfigurable single-electron transistor arrays
YH Chen, Y Chen, JD Huang - VLSI Design, Automation and …, 2015 - ieeexplore.ieee.org
The power dissipation has become a crucial issue for most electronic circuit and system
designs nowadays when fabrication processes exploit even deeper submicron technology …
designs nowadays when fabrication processes exploit even deeper submicron technology …
Dynamic diagnosis for defective reconfigurable single-electron transistor arrays
YJ Li, CY Huang, CC Wu, YC Chen… - … Transactions on Very …, 2017 - ieeexplore.ieee.org
Single-electron transistor (SET) at room temperature has been demonstrated as a promising
device for extending Moore's law due to its ultralow-power consumption. Previous works …
device for extending Moore's law due to its ultralow-power consumption. Previous works …
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model
CC Wu, YH Hu, CC Lin, YC Chen, JD Huang… - ACM Journal on …, 2021 - dl.acm.org
Singe-Electron Transistor (SET) is considered as a promising candidate of low-power
devices for replacement or co-existence with Complementary Metal-Oxide-Semiconductor …
devices for replacement or co-existence with Complementary Metal-Oxide-Semiconductor …
Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate Arrays
CC Wu, KH Ho, JD Huang… - 2018 IEEE Computer …, 2018 - ieeexplore.ieee.org
Power consumption has become a primary obstacle for circuit designs at present. Single-
Electron Transistor (SET) at room temperature has been demonstrated as a promising …
Electron Transistor (SET) at room temperature has been demonstrated as a promising …