Modern development methods and tools for embedded reconfigurable systems: A survey
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
Source-to-source architecture transformation for performance optimization in BIP
Behavior, Interaction, Priorities (BIP) is a component framework for constructing systems
from a set of atomic components by using two kinds of composition operators: interactions …
from a set of atomic components by using two kinds of composition operators: interactions …
Instruction Selection
GH Blindell - Principles, Methods, and Applications, 2016 - Springer
Like most doctoral students, I started my studies by reviewing the existing, most prominent
approaches in the field. A couple of months later I thought I had acquired a sufficient …
approaches in the field. A couple of months later I thought I had acquired a sufficient …
Finder: Find efficient parallel instructions for asips to improve performance of large applications
V Gnanasambandapillai, J Peddersen… - … on Computer-Aided …, 2020 - ieeexplore.ieee.org
Application-specific instruction-set processors (ASIPs) utilize customized instructions to
speedup a specific application or a set of applications. Thus, ASIPs execute the application …
speedup a specific application or a set of applications. Thus, ASIPs execute the application …
[PDF][PDF] An end-to-end design flow for automated instruction set extension and complex instruction selection based on GCC
Extensible processors are application-specific instruction set processors (ASIPs) that allow
for customisation through user-defined instruction set extensions (ISE) implemented in an …
for customisation through user-defined instruction set extensions (ISE) implemented in an …
Centralized and Distributed Implementations of Correct-by-construction Component-based Systems by using Source-to-source Transformations in BIP
M Jaber - 2010 - theses.hal.science
The thesis studies theory and methods for generating automatically centralized and
distributed implementations from a high-level model of an application software in BIP. BIP …
distributed implementations from a high-level model of an application software in BIP. BIP …
Customising compilers for customisable processors
AC Murray - 2012 - era.ed.ac.uk
The automatic generation of instruction set extensions to provide application-specific
acceleration for embedded processors has been a productive area of research in recent …
acceleration for embedded processors has been a productive area of research in recent …
一种针对位操作密集应用的扩展指令自动选择方法
张吉豫， 刘先华， 谭明星， 程旭， 丛京生 - 电子学报, 2012 - ejournal.org.cn
本文提出一种结合位操作分析和变换的扩展指令自动选择方法. 该方法在数据流图中引入新的位
操作中间表示结点, 可精简地描述位访问操作. 编译器可对程序数据流图进行选择性循环展开和 …
操作中间表示结点, 可精简地描述位访问操作. 编译器可对程序数据流图进行选择性循环展开和 …
Dataflow programming for systems design space exploration for multicore platforms
C Lucarz - 2011 - infoscience.epfl.ch
Nowadays processing systems are asked to support increasing complex and demanding
high-performance applications, especially in the signal processing and video processing …
high-performance applications, especially in the signal processing and video processing …
[PDF][PDF] Hardware/software partitioning for custom instruction processors
K Atasu - These de doctorat, Bogaziçi University, 2007 - comparch.doc.ic.ac.uk
In this thesis, we describe an integer linear programming (ILP) based system called CHIPS
for identifying custom instructions given the available data bandwidth and transfer latencies …
for identifying custom instructions given the available data bandwidth and transfer latencies …