Oblivm: A programming framework for secure computation

C Liu, XS Wang, K Nayak, Y Huang… - 2015 IEEE Symposium …, 2015 - ieeexplore.ieee.org
We design and develop ObliVM, a programming framework for secure computation. ObliVM
offers a domain specific language designed for compilation of programs into efficient …

DRAGON: breaking GPU memory capacity limits with direct NVM access

P Markthub, ME Belviranli, S Lee… - … Conference for High …, 2018 - ieeexplore.ieee.org
Heterogeneous computing with accelerators is growing in importance in high performance
computing (HPC). Recently, application datasets have expanded beyond the memory …

Extending the power-efficiency and performance of photonic interconnects for heterogeneous multicores with machine learning

S Van Winkle, AK Kodi, R Bunescu… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
As communication energy exceeds computation energy in future technologies, traditional on-
chip electrical interconnects face fundamental challenges in the many-core era. Photonic …

Bandwidth-Effective DRAM Cache for GPU s with Storage-Class Memory

J Hong, S Cho, G Park, W Yang… - … Symposium on High …, 2024 - ieeexplore.ieee.org
We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-
Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity …

A survey of architectural approaches for improving GPGPU performance, programmability and heterogeneity

M Khairy, AG Wassal, M Zahran - Journal of Parallel and Distributed …, 2019 - Elsevier
With the skyrocketing advances of process technology, the increased need to process huge
amount of data, and the pivotal need for power efficiency, the usage of Graphics Processing …

UMH: A hardware-based unified memory hierarchy for systems with multiple discrete GPUs

AK Ziabari, Y Sun, Y Ma, D Schaa, JL Abellán… - ACM Transactions on …, 2016 - dl.acm.org
In this article, we describe how to ease memory management between a Central Processing
Unit (CPU) and one or multiple discrete Graphic Processing Units (GPUs) by architecting a …

Preliminary results on using static analysis tools for software inspection

N Nagappan, L Williams, J Hudepohl… - 15th International …, 2004 - ieeexplore.ieee.org
Software inspection has been shown to be an effective defect removal practice, leading to
higher quality software with lower field failures. Automated software inspection tools are …

Memory management strategies in CPU/GPU database systems: A survey

I Arefyeva, D Broneske, G Campero… - … and Structures. Facing …, 2018 - Springer
GPU-accelerated in-memory database systems have gained a lot of popularity over the last
several years. However, GPUs have limited memory capacity, and the data to process might …

Efficient data sharing on heterogeneous systems

V Garcia-Flores, E Ayguadé… - 2017 46th International …, 2017 - ieeexplore.ieee.org
General-purpose computing on GPUs has become more accessible due to features such as
shared virtual memory and demand paging. Unfortunately it comes at a price, and that is …

Automatically exploiting implicit pipeline parallelism from multiple dependent kernels for gpus

G Kim, J Jeong, J Kim, M Stephenson - Proceedings of the 2016 …, 2016 - dl.acm.org
Execution of GPGPU workloads consists of different stages including data I/O on the CPU,
memory copy between the CPU and GPU, and kernel execution. While GPU can remain idle …