Interconnect scaling has become a major design challenge for traditional planar (2D) integrated circuits (ICs). Three-dimensional (3D) IC that stacks multiple device layers …
S Zhuravlev, JC Saez, S Blagodurov… - … on Parallel and …, 2012 - ieeexplore.ieee.org
Execution time is no longer the only metric by which computational systems are judged. In fact, explicitly sacrificing raw performance in exchange for energy savings is becoming a …
J Meng, K Kawakami, AK Coskun - Proceedings of the 49th Annual …, 2012 - dl.acm.org
3D multicore systems with stacked DRAM have the potential to boost system performance significantly; however, this performance increase may cause 3D systems to exceed the …
The rising use of deep learning and other big-data algorithms has led to an increasing demand for hardware platforms that are computationally powerful, yet energy-efficient. Due …
Modern processors such as Tilera's Tile64, Intel's Nehalem, and AMD's Opteron are migrating memory controllers (MCs) on-chip, while maintaining a large, flat memory address …
Several key attributes of a 3D integrated chip structure are analyzed in this work. Critical features related to the effect of the size of the substrate, heat sink, device layer, through …
In this article, we study the problem of how to maximize the throughput of a periodic real-time system under a given peak temperature constraint. We assume that different tasks in our …
X Zhou, J Yang, Y Xu, Y Zhang… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and reduce …
Data centers can go green by saving electricity in two major areas: computing and cooling. Servers in data centers require a constant supply of cold air from on-site cooling …