[PDF][PDF] Error Sensitivity of the Linux Kernel Executing on PowerPC G4 and Pentium 4 Processors.

W Gu, Z Kalbarczyk, RK Iyer - DSN, 2004 - researchgate.net
The goals of this study are:(i) to compare Linux kernel (2.4. 22) behavior under a broad
range of errors on two target processors—the Intel Pentium 4 (P4) running RedHat Linux 9.0 …

[图书][B] Interconnections for Computer Communications and Packet Networks

R Rojas-Cessa - 2016 - taylorfrancis.com
This book introduces different interconnection networks applied to different systems.
Interconnection networks are used to communicate processing units in a multi-processor …

Throughput region of finite-buffered networks

P Giaccone, E Leonardi, D Shah - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
Most of the current communication networks, including the Internet, are packet switched
networks. One of the main reasons behind the success of packet switched networks is the …

输入排队结构交换机分组调度研究

熊庆旭 - 通信学报, 2005 - infocomm-journal.com
以决定分组调度算法的交换结构为基础, 从协调, 减少和隔离输入排队交换结构中输入输出竞争
裁决冲突的角度, 分别讨论了VOQ, CIOQ, CICQ 结构中的分组调度问题, 并以当前最新的调度 …

On the maximal throughput of networks with finite buffers and its application to buffered crossbars

P Giaccone, E Leonardi, D Shah - Proceedings IEEE 24th …, 2005 - ieeexplore.ieee.org
The advent of packet networks has motivated many researchers to study the performance of
networks of queues in the last decade or two. However, most of the previous work assumes …

Scheduling algorithm for VOQ switches

D Banovic, I Radusinovic - AEU-International Journal of Electronics and …, 2008 - Elsevier
A variety of matching schemes for VOQ switches that provide high throughput for uniform
traffic have been proposed. The dual round robin matching (DRRM) scheme has …

Throughput analysis of shared-memory crosspoint buffered packet switches

Z Dong, R Rojas-Cessa - IET communications, 2012 - IET
This study presents a theoretical throughput analysis of two buffered-crossbar switches,
called shared-memory crosspoint buffered (SMCB) switches, in which crosspoint buffers are …

Load-balanced combined input-crosspoint buffered packet switch and long round-trip times

R Rojas-Cessa, Z Dong, Z Guo - IEEE Communications Letters, 2005 - ieeexplore.ieee.org
The amount of memory in buffered crossbars is proportional to the number of crosspoints, or
O (N/sup 2/), where N is the number of ports, and to the crosspoint buffer size, which is …

Combined input-crosspoint buffered packet switch with flexible access to crosspoints buffers

R Rojas-Cessa, Z Dong - 2006 International Caribbean …, 2006 - ieeexplore.ieee.org
The performance of Internet routers is greatly defined by the adopted switch architecture.
Combined input-crosspoint buffered (CICB) packet switches are being considered of …

Load-balanced combined input-crosspoint buffered packet switches

R Rojas-Cessa, Z Dong - IEEE transactions on communications, 2011 - ieeexplore.ieee.org
Combined input-crosspoint buffered (CICB) switches can achieve high switching
performance without speedup. However, the dedicated crosspoint buffers in a CICB switch …