Energy-constrained biomedical recording systems need power-efficient data converters and
good signal compression in order to meet the stringent power consumption requirements of …

This work presents a novel 4-bit subranging nonuniform sampling (NUS) memristive neural
network-based analog-to-digital converter (ADC) with improved performance trade-off …

This paper introduces a voltage-controlled oscillator (VCO)-based nonuniform sampling
(NUS) analog-to-digital converter (ADC), which shifts the conventional voltage-domain level …

In this article, an efficient architecture for a low-power, high-resolution flash analog-to-digital
converter (flash ADC) is presented. It operates at 12-bit resolution with a sampling frequency …

A low-power, wide-bandwidth, and high-dynamic-range (DR) ADC is one of the critical
building blocks in a wireless receiver design, in which a continuous-time delta-sigma …

With the advent of the fifth-generation (5G) standard for cellular networks, direct RF receivers
are becoming popular in applications such as cellular base stations. Such systems require …

This paper introduces two approaches to compute the average sampling frequency (ASF) of
ideal level crossing analog-to-digital converters (LC-ADCs). The first is based on Rice's …

A sampling jitter tolerant continuous-time (CT) pipeline ADC has been presented in this
thesis. In conventional discrete-time (DT) pipeline ADCs, the input is sampled upfront. The …

(57) ABSTRACT A voltage comparator and a programmable counter coupled to a high-
speed clock are used to provide a near constant delay time for use in a closed-loop system …

The sampling rate plays a key role in wireless applications at very high-frequency range.
Flash analog-to-digital converter (ADC) betters the slow converter counterparts in this regard …