Configurable analog routing methodology via technology and design constraint unification

PC Pan, HM Chen, YK Cheng, J Liu… - Proceedings of the …, 2012 - dl.acm.org
In this paper, we present a novel configurable analog routing methodology for more efficient
analog layout automation. By the help of OpenAccess constraint group format, the …

[PDF][PDF] SWARM: a self-organization approach for layout automation in analog IC design

D Marolt, J Scheible, G Jerke… - International …, 2016 - publikationen.reutlingen-university …
Optimization-based analog layout automation does not yet find evident acceptance in the
industry due to the complexity of the design problem. This paper presents a Self-organized …

Low power physical design and verification in 16nm finfet technology

S Sreevidya, R Holla, R Raghu - 2019 3rd International …, 2019 - ieeexplore.ieee.org
In the recent years, there has been rapid increase in complexity of System on Chip designs.
As the functionality of the chip increases, design and verification runtime also increases …

Demixgen: Deterministic mixed-signal layout generation with separated analog and digital signal paths

MPH Lin, PH Chang, SY Lee… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
With shrinking process technology, decreasing supply voltage, and increasing clock
frequency, noise reduction becomes more and more crucial to the success of modern mixed …

[PDF][PDF] Layout automation in analog IC design with formalized and nonformalized expert knowledge

D Marolt - 2018 - core.ac.uk
If the dissertation at hand tells us the truth about its author, this is probably my fault. If it tells
us the truth about a heroic achievement in electronic design automation, this is due to a lot of …

Schematic-driven physical verification: Fully automated solution for analog IC design

A Arafa, H Wagieh, R Fathy, J Ferguson… - 2012 IEEE …, 2012 - ieeexplore.ieee.org
Designing ICs (integrated circuits) is inherently a complex task involving human expertise as
well as aids intended to accelerate the process. A fundamental requirement for design …

Extraction and application of wiring symmetry rules to route analog multiport terminals

R Martins, N Lourenço, A Canelas… - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
In this paper an innovative routing methodology considering wiring symmetry (WS) for
multiport multiterminal (MP/MT) signal nets of analog and mixed-signal integrated circuits …

Analýza metod digitálního návrhu a softwarového vývoje systémů na čipu

JT Emil - 2023 - dspace.cvut.cz
Standardní praktiky návrhu digitální logiky jsou formalizovány v dostupné literatuře, ale
principy fungování potřebných softwarových nástrojů jsou popsány jen v omezených, silně …

SIAR: Splitting-graph-based interactive analog router

F Yang, H Yao, Q Zhou, Y Cai - Proceedings of the 21st edition of the …, 2011 - dl.acm.org
As analog and mixed-signal (AMS) circuitry gains increasing portions in modern SoCs,
automotive analog routing is becoming more and more important. This paper presents a fast …

Routability of twisted common-centroid capacitor array under signal coupling constraints

G Chen, B Liu, S Nakatake… - 2016 IEEE 59th …, 2016 - ieeexplore.ieee.org
We address layout generation of on-chip matched capacitors with the high relative accuracy.
Our twisted common-centroid pattern of unit capacitors consider the post-placement …