There is mounting evidence that automatic test pattern generation tools capable of
producing tests with high coverage of defects occurring in the large semiconductor …

Test point insertion (TPI) is a widely used technique for testability enhancement, especially
for logic built-in self-test (LBIST) due to its relatively low fault coverage. In this paper, we …

This paper presents DPPM reduction results achieved with new Defect Oriented Test (DOT)
methods/patterns applied to designs manufactured in advanced FinFET technologies. Focus …

Probabilistic approaches to the detection of untargeted defects, such as n-detect and
standard LBIST (logic built-in-self-test), generally suffer from the need to apply very long test …

Logic built-in self-test (LBIST), originally introduced for board, system, and in-field tests, is
now being increasingly used with on-chip test compression. This hybrid approach allows …

Manufacturing defects can cause hard-to-detect (HTD) faults in fin field-effect transistor
(FinFET) static random access memories (SRAMs). Detection of these faults, such as …

This paper presents a novel low-area scan-based logic built-in self-test (LBIST) scheme that
addresses stringent test requirements of certain application domains such as the fast …

Launch-Switching-Activity (LSA) is a serious problem during at-speed testing of integrated
circuits, since localized LSA may lead to severe IR-drop and thus failures. The excessive …

Growing reverse-engineering attempts to steal or violate a design intellectual property (IP),
or to identify the device technology in order to counterfeit integrated circuits (ICs), raise …

Test points are inserted into a circuit to improve its testability or diagnosability. The
diagnosability goal may be to reduce the number of indistinguished fault pairs, increase the …