[图书][B] Design for embedded image processing on FPGAs

DG Bailey - 2023 - books.google.com
Design for Embedded Image Processing on FPGAs Bridge the gap between software and
hardware with this foundational design reference Field-programmable gate arrays (FPGAs) …

ReCoBus-Builder—A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS

D Koch, C Beckhoff, J Teich - 2008 International conference on …, 2008 - ieeexplore.ieee.org
In this paper, we present the ReCoBus-builder tool chain that simplifies the generation of
dynamically reconfigurable systems to almost a push-button process. The generated …

Design methodology for intelligent technical systems

J Gausemeier, FJ Rammig, W Schäfer - Lecture Notes in Mechanical …, 2014 - Springer
The Collaborative Research Centre 614" Self-Optimizing Concepts and Structures in
Mechanical Engineering", funded from 2002 to 2013 by the German Research Foundation …

Logic chip, logic system and method for designing a logic chip

D Koch, T Streichert, C Haubelt, J Teich - US Patent 8,018,249, 2011 - Google Patents
(57) ABSTRACT A logic chip has a plurality of individually addressable resource blocks
each of the resource blocks having logic circuitry, and a communication bar extending …

Design optimizations for tiled partially reconfigurable systems

M Koester, W Luk, J Hagemeyer… - … Transactions on Very …, 2010 - ieeexplore.ieee.org
In partially reconfigurable architectures, system components can be dynamically loaded and
unloaded allowing resources to be shared over time. Dynamic system components are …

[图书][B] Reconfigurable system design and verification

PA Hsiung, MD Santambrogio, CH Huang - 2018 - taylorfrancis.com
Reconfigurable systems have pervaded nearly all fields of computation and will continue to
do so for the foreseeable future. Reconfigurable System Design and Verification provides a …

Reconfigurable SoC FPGA based: Overview and trends

H Abdelkrim, SB Othman… - … Conference on Advanced …, 2017 - ieeexplore.ieee.org
Embedded System Reconfigurability has begun since few years thanks to the FPGA
capabilities. Many approaches and methodologies have been adopted in literature. Several …

[PDF][PDF] Dynamic partial reconfiguration contribution on system on programmable chip architecture for motor drive implementation

H Abdelkrim, SB Othman, AKB Salem, SB Saoud - Am. J. Eng. Applied Sci, 2012 - Citeseer
Problem statement: Nowadays, Reconfigurable System on Chip (RSoC) shows great
potential in many high performance applications that benefit from Hardware customization …

Efficient reconfigurable on-chip buses for FPGAs

D Koch, C Haubelt, J Teich - 2008 16th International …, 2008 - ieeexplore.ieee.org
This paper presents techniques for generating on-chip buses suitable for dynamically
integrating hardware modules into an FPGA-based SoC by partial reconfiguration. The …

A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs

D Koch, C Beckhoff, J Teich - Proceedings of the ACM/SIGDA …, 2009 - dl.acm.org
In this paper, we present and analyze a sophisticated communication architecture that
allows to integrate many different modules into a system by FPGA reconfiguration at runtime …