The Clock Constraint Specification Language (CCSL) provides expressions and relations to
specify the time requirements and causal dependencies of systems. It was initially proposed …

Transforming a specification language into a language supported by a verification tool is a
widely adopted way of doing formal verification. It enables the reuse of existing languages …

Transforming a specification language into a language supported by a verification tool is a
widely adopted way of doing formal verification. It enables the reuse of existing languages …

Modeling timing constraints of distributed systems and multi-clock electronic systems aims to
describe different time requirements aspects at a higher abstraction level. An important …

Network component analysis (NCA) has been established as a promising tool for
reconstructing gene regulatory networks from microarray data. NCA is a method that can …

Embedded systems are challenging to design, due to the implementation platform
constraints that have to be considered, preferably from early stages of design, next-by …

In order to better abstract lane mark edge and identify it, this paper proposes a new edge
extraction method based on maximum entropy. This method combines both one-dimension …

A miniaturização das componentes electrónicas permite que os sistemas computacionais
tenham uma proliferação acelerada. Estes sistemas estão integrados nos mais diversos …

Giotto is a time-triggered embedded programming language which provides an abstract
programming model for hard real-time applications. It effectively decouples the …

Generally, real-time embedded control systems are very demanding from the timing point of
view. Increasing complexity and criticality of such systems leads to a challenge regarding …