Reversible realization of N-bit arithmetic circuit for low power loss ALU applications

V Shukla, OP Singh, GR Mishra, RK Tiwari - Procedia Computer Science, 2018 - Elsevier
Today, low loss efficient digital calculating systems are among the key focus of researchers.
Fast and efficient processing parts are in the concrete demands of this era. Reversible digital …

Design and implementation of CNTFET-based reversible combinational digital circuits using the GDI technique for ultra-low power applications

M Shaveisi, A Rezaei - BioNanoScience, 2020 - Springer
It is obvious that the design of low power digital circuits is very important. Hence, reversible
logic can be used as the great method for reducing power consumption. In this paper, we …

Realization of 2: 4 reversible decoder and its applications

N Pandey, N Dadhich, MZ Talha - … International Conference on …, 2014 - ieeexplore.ieee.org
In this paper realization of 2: 4 reversible decoder is proposed which can provide active high
as well as active low outputs. The proposed decoder uses Feynman and Fredkin gates and …

A novel approach for reversible realization of 4× 4 bit vedic multiplier circuit

V Shukla, OP Singh, GR Mishra, RK Tiwari - Advances in VLSI …, 2020 - Springer
The availability of fast and efficient processing systems is the basic requirement of current
era. In digital systems, multiplications is one of the major operations, which limit the speed …

[PDF][PDF] Performance Analysis of Low Power Decoders Using Reversible Computing

MP Singh, B Singh, AS Bhandari - International Journal of Research, 2015 - academia.edu
In this paper performance analysis of 2: 4 reversible decoder is proposed which can provide
active high as well as active low outputs. The proposed decoder uses BVF gate, Double …

Application of CSMT gate for efficient reversible realization of binary to gray code converter circuit

V Shukla, OP Singh, GR Mishra… - 2015 IEEE UP Section …, 2015 - ieeexplore.ieee.org
Technological innovations of this era demand the application of reversible logic approach to
design various low power loss digital systems. Reversible designs are widely applicable in …

A novel approach to design a redundant binary signed digit adder cell using reversible logic gates

V Shukla, OP Singh, GR Mishra… - 2015 IEEE UP Section …, 2015 - ieeexplore.ieee.org
Redundant Binary Signed Digit (RBSD) number system motivates the researchers to design
high speed processing devices. RBSD adders can perform fast addition of two numbers due …

A novel approach for reversible realization of 3: 8 decoder circuit with optimized performance parameters

V Shukla, OP Singh, GR Mishra - … International Conference on …, 2018 - ieeexplore.ieee.org
Reversible realization of digital circuits basically aims for the low loss efficient computing
systems. Among combinational digital circuits, decoders are considered as one of the most …

Performance parameters optimization and implementation of adder/subtractor circuit using reversible logic approach

V Shukla, OP Singh, GR Mishra… - 2016 11th International …, 2016 - ieeexplore.ieee.org
Arithmetic digital processing sub-systems are considered as one of the major component of
any electronic computing system. The adder/subtractor circuit is one of the vital part of …

[PDF][PDF] Design of Reversible Code Converters for Quantum Computer based Systems

M Gandhi, J Devishree - International Journal of Computer …, 2013 - academia.edu
Reversible logic is one of the latest technologies having promising applications in Quantum
Computing. Reversible code converters are a class of reversible circuits that are used to …