2017-08-09 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

2019-03-01 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

An integrated circuit includes a memory interface, coupled to a memory to store data
corresponding to instructions, and an operations queue to buffer memory operations …

US11307873B2 - Apparatus, methods, and systems for unstructured data flow in a
configurable spatial accelerator with predicate propagation and merging - Google Patents …

Compilers for compiling computer programs and apparatuses including compilers are
disclosed herein. A compiler may include one or more analyzers to parse and analyze …

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL
TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL …

US10564980B2 - Apparatus, methods, and systems for conditional queues in a configurable
spatial accelerator - Google Patents US10564980B2 - Apparatus, methods, and systems for …

Techniques and mechanisms for exchanging control signals in a data path module of a data
stream processing engine. In an embodiment, the data path module may be configured to …

Abstract Systems, methods, and apparatuses relating to debugging a configurable spatial
accelerator are described. In one embodiment, a processor includes a plurality of …

A specialized memory access processor is placed between a main processor and
accelerator hardware to handle memory access for the accelerator hardware. The …