A review of NBTI mechanisms and models

S Mahapatra, N Parihar - Microelectronics Reliability, 2018 - Elsevier
A comprehensive review is done of different NBTI mechanisms and models proposed in the
literature over the past years. The Reaction-Diffusion (RD) model based comprehensive …

BTI analysis tool—Modeling of NBTI DC, AC stress and recovery time kinetics, nitrogen impact, and EOL estimation

N Parihar, N Goel, S Mukhopadhyay… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
A comprehensive modeling framework is presented to predict the time kinetics of negative
bias temperature instability stress and recovery during and after dc and ac stresses and also …

Recent progress in physics-based modeling of electromigration in integrated circuit interconnects

WS Zhao, R Zhang, DW Wang - Micromachines, 2022 - mdpi.com
The advance of semiconductor technology not only enables integrated circuits with higher
density and better performance but also increases their vulnerability to various aging …

A 3-D TCAD framework for NBTI—Part I: Implementation details and FinFET channel material impact

R Tiwari, N Parihar, K Thakor, HY Wong… - … on Electron Devices, 2019 - ieeexplore.ieee.org
The time kinetics of interface trap generation and passivation (ΔN IT) and its contribution (ΔV
IT) during and after negative bias temperature instability (NBTI) stress is calculated by using …

Modeling of NBTI using BAT framework: DC-AC stress-recovery kinetics, material, and process dependence

S Mahapatra, N Parihar - IEEE Transactions on Device and …, 2020 - ieeexplore.ieee.org
Threshold voltage shift (ΔVT) due to Negative Bias Temperature Instability (NBTI) in p-
MOSFETs is modeled using the BTI Analysis Tool (BAT) framework. The ΔV T time kinetics …

Modeling of NBTI kinetics in RMG Si and SiGe FinFETs, part-I: DC stress and recovery

N Parihar, RG Southwick, M Wang… - … on Electron Devices, 2018 - ieeexplore.ieee.org
An ultrafast (10-μs delay) measurement technique is used to characterize the negative bias
temperature instability-induced threshold voltage shift (ΔV T) in replacement metal gate …

Modeling of NBTS effects in p-channel power VDMOSFETs

D Danković, N Mitrović, Z Prijić… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
This paper studies negative bias temperature instability in commercial IRF9520 p-channel
power VDMOSFETs under both static and pulsed bias stress conditions in order to model …

A physical model for bulk gate insulator trap generation during bias-temperature stress in differently processed p-channel FETs

T Samadder, N Choudhury, S Kumar… - … on Electron Devices, 2021 - ieeexplore.ieee.org
A deterministic reaction-diffusion–drift model is used for the time kinetics of bulk gate
insulator trap generation in p-channel Field Effect Transistors (FETs) under inversion stress …

A 3-D TCAD framework for NBTI, Part-II: Impact of mechanical strain, quantum effects, and FinFET dimension scaling

R Tiwari, N Parihar, K Thakor, HY Wong… - … on Electron Devices, 2019 - ieeexplore.ieee.org
The TCAD framework developed in part-I of this paper is used to study the impact of fin
length (FL) and fin width (FW) scaling on interface trap generation (ΔV IT) during negative …

Modeling of DC-AC NBTI stress-recovery time kinetics in P-channel planar bulk and FDSOI MOSFETs and FinFETs

N Choudhury, N Parihar, N Goel… - IEEE Journal of the …, 2020 - ieeexplore.ieee.org
The physics-based BTI Analysis Tool (BAT) is used to model the time kinetics of threshold
voltage shift (ΔV T) during and after NBTI in p-channel planar bulk and FDSOI MOSFETs …