The fundamentals and state of the art in fractional-N phase-locked-loop (PLL)-based
frequency synthesis are reviewed. Particular emphasis is placed on delta-sigma fractional-N …

The book Computer Applications in Engineering and Management is about computer
applications in management, electrical engineering, electronics engineering, and civil …

This paper presents a low-power high-bit-rate phase modulator based on a digital PLL with
single-bit TDC and two-point injection scheme. At high bit rates, this scheme requires a …

This paper presents a modified structure for the first-order digital delta-sigma modulator
(DDSM) which yields the maximum sequence length (N) for all constant digital inputs and for …

This work presents a fractional-ring-oscillator (RO)-based digital phase-locked loop (DPLL).
To achieve ultralow jitter, the proposed RO-DPLL used a technique to reduce the dominant …

Integer boundary spurs appear in the passband of the loop response of fractional-N phase
lock loops and are, therefore, a potentially significant component of the phase noise. In spite …

This book describes several Digital Delta-Sigma Modulator (DDSM) architectures, including
multi stage noise shaping (MASH), error feedback modulator (EFM) and single quantizer …

For multistage noise-shaping (MASH) delta-sigma modulation, this paper presents a new
structure that is free of spurs for all input values. The proposed MASH structure cascades …

The digital multistage-noise-shaping (MASH) ΣΔ modulators used in fractional frequency
synthesizers are prone to spur tone generation in their output spectrum. In this paper, the …

Phase locked loops for fractional frequency synthesis typically use Digital Modulators
(DDSMs) as their divider controllers. Different types and configurations of DDSMs have been …