Architecture design with STT-RAM: Opportunities and challenges

P Chi, S Li, Y Cheng, Y Lu, SH Kang… - 2016 21st Asia and …, 2016 - ieeexplore.ieee.org
The emerging spin-transfer torque magnetic random-access memory (STT-RAM) has
attracted a lot of interest from both academia and industry in recent years. It has been …

Spin-transfer torque memories: Devices, circuits, and systems

X Fong, Y Kim, R Venkatesan, SH Choday… - Proceedings of the …, 2016 - ieeexplore.ieee.org
Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …

TapeCache: A high density, energy efficient cache based on domain wall memory

R Venkatesan, V Kozhikkottu, C Augustine… - Proceedings of the …, 2012 - dl.acm.org
Domain Wall Memory (DWM) is a recently developed spin-based memory technology in
which several bits of data are densely packed into the domains of a ferromagnetic wire …

The bloom paradox: When not to use a bloom filter

O Rottenstreich, I Keslassy - IEEE/ACM Transactions on …, 2014 - ieeexplore.ieee.org
In this paper, we uncover the Bloom paradox in Bloom Filters: Sometimes, the Bloom Filter is
harmful and should not be queried. We first analyze conditions under which the Bloom …

A compression-based area-efficient recovery architecture for nonvolatile processors

Y Wang, Y Liu, Y Liu, D Zhang, S Li… - … , Automation & Test …, 2012 - ieeexplore.ieee.org
Nonvolatile processor has become an emerging topic in recent years due to its zero standby
power, resilience to power failures and instant on feature. This paper first demonstrated a …

Prediction hybrid cache: An energy-efficient STT-RAM cache architecture

J Ahn, S Yoo, K Choi - IEEE Transactions on Computers, 2015 - ieeexplore.ieee.org
Spin-transfer torque RAM (STT-RAM) has emerged as an energy-efficient and high-density
alternative to SRAM for large on-chip caches. However, its high write energy has been …

Cache design with domain wall memory

R Venkatesan, VJ Kozhikkottu… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
Domain wall memory (DWM) is a recently developed spin-based memory technology in
which several bits of data are densely packed into the domains of a ferromagnetic wire …

Energy-efficient architecture for advanced video memory

F Sampaio, M Shafique, B Zatt… - 2014 IEEE/ACM …, 2014 - ieeexplore.ieee.org
An energy-efficient hybrid on-chip video memory architecture (enHyV) is presented that
combines private and shared memories using a hybrid design (ie, SRAM and emerging STT …

Building energy-efficient multi-level cell STT-RAM caches with data compression

L Liu, P Chi, S Li, Y Cheng, Y Xie - 2017 22nd Asia and South …, 2017 - ieeexplore.ieee.org
Spin-transfer torque magnetic random access memory (STT-RAM) technology has emerged
as a potential replacement of SRAM in cache design, especially for building large-scale and …

Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache

J Li, L Shi, CJ Xue, C Yang, Y Xu - 2011 9th IEEE Symposium …, 2011 - ieeexplore.ieee.org
Hybrid cache architectures have been proposed to mitigate the increasing on-chip power
dissipation through the exploitation of the emerging non-volatile memories (NVMs). To …