FPGA implementation of 16-point radix-4 complex FFT core using NEDA

A Mankar, AD Das, N Prasad - 2013 Students Conference on …, 2013 - ieeexplore.ieee.org
NEDA is one of the techniques to implement many digital signal processing systems that
require multiply and accumulate units. FFT is one of the most employed blocks in many …

An efficient distributed arithmetic-based realization of the decision feedback equalizer

MS Prakash, RA Shaik, S Koorapati - Circuits, Systems, and Signal …, 2016 - Springer
A distributed arithmetic (DA)-based decision feedback equalizer architecture for IEEE
802.11 b PHY scenarios is presented. As the transmission data rate increases, the hardware …

DA-based circuits for inner-product computation

M Mehendale, M Sharma… - Arithmetic Circuits for DSP …, 2017 - books.google.com
Distributed arithmetic (DA) is a technique for multiplier less implementation of inner product
of two vectors, particularly when one of the vectors is a constant and known a simply the …

Reduced Complexity Distributed Arithmetic Architecture for FIR Filters

K Kozorez, A Rashich - … Conference on Next Generation Wired/Wireless …, 2022 - Springer
Filters with a finite impulse response are important blocks in signal reception and processing
applications. The relatively high complexity of FIR filters implementation in FPGA is due to …

Design of distributed arithmetic based reconfigurable filters

M Sandhya, E Senthilkumar… - 2016 IEEE Annual India …, 2016 - ieeexplore.ieee.org
Digital signal processing techniques are widely used for a large number of applications with
digital filters being considered as one of the basic elements. Digital filter design involves …

FPGA Implementation of Fast Fourier Transform Core Using NEDA

A Mankar - 2013 - ethesis.nitrkl.ac.in
Transforms like DFT are a major block in communication systems such as OFDM, etc. This
thesis reports architecture of a DFT core using NEDA. The advantage of the proposed …

FPGA implementation of discrete Fourier transform core using NEDA

A Mankar, N Prasad, S Meher - 2013 International Conference …, 2013 - ieeexplore.ieee.org
Transforms like Discrete Fourier Transform (DFT) are a major block in communication
systems such as OFDM, etc. This paper reports architecture of a DFT core using new …

[PDF][PDF] Low power and high speed DFT architecture

AK Jameil - 2016 - iasj.net
Discrete Fourier Transform (DFT) plays essential role in many signal processing
applications. In this paper, novel hardware architecture is presented for DFT. It is based on …

High performance architectures for adaptive equalizers using distributed arithmetic

SP Matcha - 2016 - shodhganga.inflibnet.ac.in
In communications adaptive decision feedback equalizers ADFEs are an effective means of
countering the intersymbol interference ISI introduced by the channel and also to keep track …

Układy logiczne-niewykorzystane szanse techniki cyfrowej dla telekomunikacji i teleinformatyki

T Łuba, M Rawski, Z Zbierzchowski - Przegląd Telekomunikacyjny+ …, 2008 - infona.pl
Celem artykułu jest promocja nowych metod i narzędzi syntezy logicznej w projektowaniu
układów cyfrowych dla potrzeb telekomunikacji. Omawiana jest aktualnie badana na …