Performance evaluation of various cmos designs for signal processing applications

S Vella, VVS Kothapalli… - 2024 5th International …, 2024 - ieeexplore.ieee.org
The signal processing module or system in establishing communication needs to be
proficient to make it cost and quality-effective and this is possible by forecasting right from …

Performance Analysis of Full Adder based on Domino Logic Technique

K Kukreti, P Kumar, S Barthwal… - 2021 6th International …, 2021 - ieeexplore.ieee.org
In modern VLSI area efficient devices are most used because most of the devices are
becoming portable. The Domino logic techniqueis often employed in designing the area …

An enhanced Gate Diffusion Input technique for low power applications

S Radhakrishnan, T Nirmalraj - Microelectronics Journal, 2019 - Elsevier
Power consumption in data manipulation strongly depends on the performance of full adder
which is the primary block from which any larger circuits could be stacked. This paper …

Comparison of Different Full Adders and its Applications

CP Kumar, CK Chaitanya… - … Journal of Analog …, 2023 - ecc.journalspub.info
Full Adder is a fundamental block in Arithmetic and Logical unit (ALU) which is a core of any
processor. It is extensively used in General Purpose Processors (GPP) along with various …

[PDF][PDF] DESIGN AND ANALYSIS OF FULL ADDER BASED ON DOMINO LOGIC TECHNIQUE

MD Satyanarayana, N Ramya, S Tejaswini, PL Krishna… - publications.anveshanaindia.com
Full adder is one of the basic blocks for many such VLSI circuits to perform multiplication,
division and exponentiation operations. The demands of upcoming computing, as well as …