FPT: A fixed-point accelerator for torus fully homomorphic encryption

M Van Beirendonck, JP D'Anvers, F Turan… - Proceedings of the …, 2023 - dl.acm.org
Fully Homomorphic Encryption (FHE) is a technique that allows computation on encrypted
data. It has the potential to drastically change privacy considerations in the cloud, but high …

Toward the multiple constant multiplication at minimal hardware cost

R Garcia, A Volkova - … Transactions on Circuits and Systems I …, 2023 - ieeexplore.ieee.org
Multiple Constant Multiplication (MCM) over integers is a frequent operation arising in
embedded systems that require highly optimized hardware. An efficient way is to replace …

All-fibre phase filters with 1-GHz resolution for high-speed passive optical logic processing

S Kaushal, A Aadhi, A Roberge, R Morandotti… - Nature …, 2023 - nature.com
Photonic-based implementation of advanced computing tasks is a potential alternative to
mitigate the bandwidth limitations of electronics. Despite the inherent advantage of a large …

Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G

Z Kaya, M Garrido - IEEE Transactions on Circuits and Systems …, 2023 - ieeexplore.ieee.org
This paper presents a novel 64-parallel 4096-point radix-2 memory-based fast Fourier
transform (FFT) architecture for 6G. This approach is the first one to use 64 parallel branches …

Experimental demonstration of soft-ROADMS with dual-arm drop elements for future optical-wireless converged access networks

OFA Gonem, RP Giddings… - Journal of Lightwave …, 2023 - ieeexplore.ieee.org
Digital signal processing (DSP)-enabled soft reconfigurable optical add/drop multiplexers
(Soft-ROADMs) offer flexible add/drop optical switching at wavelength, sub-wavelength and …

The constant multiplier FFT

M Garrido, P Malagón - … Transactions on Circuits and Systems I …, 2020 - ieeexplore.ieee.org
In this paper, we present a new fast Fourier transform (FFT) hardware architecture called
constant multiplier (CM) FFT. Whereas rotators in previous architectures must rotate among …

Low complexity implementation of OTFS transmitter using fully parallel and pipelined hardware architecture

SK Dora, HB Mishra, M Sahoo - Journal of Signal Processing Systems, 2023 - Springer
In this work, we develop the conventional hardware architecture of the orthogonal time
frequency space modulation (OTFS) based wireless transmitter to achieve highly reliable …

Reconfigurable Hyper-Parallel Fast Fourier Transform Processor based on Bit-Serial Computing

T Wu, Y Wang, F Li - IEEE Access, 2023 - ieeexplore.ieee.org
The upcoming 5G communication is committed to providing ultra-high throughput and ultra-
low delay service. However, digital signal processing technologies will be a critical …

To buffer, or not to buffer? a case study on FFT accelerators for ultra-low-power multicore clusters

L Bertaccini, L Benini, F Conti - 2021 IEEE 32nd International …, 2021 - ieeexplore.ieee.org
Hardware-accelerated multicore clusters have recently emerged as a viable approach to
deploy advanced digital signal processing (DSP) capabilities in ultra-low-power extreme …

INTERFERE, short-time Fourier-transform-based compression of complex-valued holograms with bit depth and range-adaptive quantization

R Kizhakkumkara Muhamad, T Birnbaum, D Blinder… - Applied Optics, 2024 - opg.optica.org
With digital holographic display and recording setups steadily improving and the advent of
realistic super-high-resolution holograms (> 100 megapixels), the efficient compression of …