(57) ABSTRACT A co-processor is configured for performing vector matrix multiplication
(VMM) to solve computational problems such as partial differential equations (PDE). An …

An in-memory computing system for computing vector matrix multiplications includes an
array of resistive memory devices arranged in columns and rows, such that resistive memory …

Methods and apparatus for performing matrix transforms within a memory fabric. Various
embodiments of the present disclosure are directed to converting a memory array into a …

Sparse representation of information performs powerful feature extraction on high-
dimensional data and is of interest for applications in signal processing, machine vision …

(57) ABSTRACT A DPE memristor crossbar array system includes a plurality of partitioned
memristor crossbar arrays. Each of the plu rality of partitioned memristor crossbar arrays …

US11635910B2 - Memory device interface and method - Google Patents US11635910B2 -
Memory device interface and method - Google Patents Memory device interface and method …

H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof all the devices being of a type …

A crossbar array includes a number of memory elements. A vector input register has N
voltage inputs to the crossbar array. A vector output register has M voltage outputs from the …

The present disclosure provides techniques for using a multiple-port buffer to improve a
transaction rate of a memory module. In an example, a memory module can include a circuit …

A peripheral circuit includes a data preparation circuit, configured to selectively import, to a
row or column of the resistive random access memory (RRAM) crossbar array based on a …