Non-volatile memory die with on-chip data augmentation components for use with machine learning
A Bazarsky, A Navon - US Patent 11,501,109, 2022 - Google Patents
Methods and apparatus are disclosed for implementing machine learning data
augmentation within the die of a non-volatile memory (NVM) apparatus using on-chip circuit …
augmentation within the die of a non-volatile memory (NVM) apparatus using on-chip circuit …
Realization of neural networks with ternary inputs and ternary weights in NAND memory arrays
TT Hoang, WH Choi, M Lueker-boden - US Patent 11,625,586, 2023 - Google Patents
US11625586B2 - Realization of neural networks with ternary inputs and ternary weights in
NAND memory arrays - Google Patents US11625586B2 - Realization of neural networks with …
NAND memory arrays - Google Patents US11625586B2 - Realization of neural networks with …
Accelerating sparse matrix multiplication in storage class memory-based convolutional neural network inference
TT Hoang, WH Choi, M Lueker-boden - US Patent 11,568,200, 2023 - Google Patents
Techniques are presented for accelerating in-memory matrix multiplication operations for a
convolution neural network (CNN) inference in which the weights of a filter are stored in the …
convolution neural network (CNN) inference in which the weights of a filter are stored in the …
Storage controller having data augmentation components for use with non-volatile memory die
A Bazarsky, A Navon - US Patent 11,520,521, 2022 - Google Patents
Methods and apparatus are disclosed for implementing data augmentation within a storage
controller of a data storage device based on machine learning data read from a nonvolatile …
controller of a data storage device based on machine learning data read from a nonvolatile …
Dropout in neutral networks using threshold switching selectors in non-volatile memories
A non-volatile memory device is configured for in-memory computation of layers of a neural
network by storing weight values as conductance values in memory cells formed of a series …
network by storing weight values as conductance values in memory cells formed of a series …
Inference focus for offline training of SRAM inference engine in binary neural network
CY Chen, JH Lai, KT Lee, LW Hung - US Patent 11,599,785, 2023 - Google Patents
(57) ABSTRACT A Static Random Access Memory (SRAM) device in a binary neural
network is provided. The SRAM device includes an SRAM inference engine having an …
network is provided. The SRAM device includes an SRAM inference engine having an …
Control of NAND flash memory for al applications
(57) ABSTRACT A system comprises: a three-dimensional flash memory comprising a
plurality of cells; and a controller coupled to the three-dimensional flash memory, configured …
plurality of cells; and a controller coupled to the three-dimensional flash memory, configured …
Realization of binary neural networks in nand memory arrays
Use of a NAND array architecture to realize a binary neural network (BNN) allows for matrix
multiplication and accumulation to be performed within the memory array. A unit synapse for …
multiplication and accumulation to be performed within the memory array. A unit synapse for …
Image object classification method, system and computer readable medium
YJ Wang, KH Tseng, JQ Wei, SF Huang… - US Patent …, 2024 - Google Patents
An image object classification method and system are disclosed. The method is executed by
a processor coupled to a memory. The method includes: providing an image file including at …
a processor coupled to a memory. The method includes: providing an image file including at …
Computing device for performing digital pulse-based crossbar operation and method of operating the computing device
2022-03-23 Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG
ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT …
ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT …