[图书][B] Parallel programming

T Rauber, G Rünger - 2013 - Springer
Innovations in hardware architecture, such as hyper-threading or multicore processors,
make parallel computing resources available for computer systems in different areas …

Non-relational databases on FPGAs: Survey, design decisions, challenges

J Dann, D Ritter, H Fröning - ACM Computing Surveys, 2023 - dl.acm.org
Non-relational database systems (NRDS) such as graph and key-value have gained
attention in various trending business and analytical application domains. However, while …

A high-performance, energy-efficient modular DMA engine architecture

T Benz, M Rogenmoser, P Scheffler… - IEEE Transactions …, 2023 - ieeexplore.ieee.org
Data transfers are essential in today's computing systems as latency and complex memory
access patterns are increasingly challenging to manage. Direct memory access engines …

Ripple: Profile-guided instruction cache replacement for data center applications

TA Khan, D Zhang, A Sriraman… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Modern data center applications exhibit deep software stacks, resulting in large instruction
footprints that frequently cause instruction cache misses degrading performance, cost, and …

Eavesdropping user credentials via GPU side channels on smartphones

B Yang, R Chen, K Huang, J Yang, W Gao - Proceedings of the 27th …, 2022 - dl.acm.org
Graphics Processing Unit (GPU) on smartphones is an effective target for hardware attacks.
In this paper, we present a new side channel attack on mobile GPUs of Android …

An Efficient Deep Reinforcement Learning-Based Automatic Cache Replacement Policy in Cloud Block Storage Systems

Y Zhou, F Wang, Z Shi, D Feng - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
With the popularity of cloud services, cloud block storage (CBS) systems have been widely
deployed by cloud providers. Cloud cache plays a vital role in maintaining high and stable …

Reinforcement Learning-Based Cache Replacement Policies for Multicore Processors

MA Souza, HC Freitas - IEEE Access, 2024 - ieeexplore.ieee.org
High-performance computing (HPC) systems need to handle ever-increasing data sizes for
fast processing and quick response times. However, modern processors' caches are unable …

Methods of extracting parameters of the processor caches

S Shen, Z Li, W Song - International Workshop on Security, 2022 - Springer
As attack scenarios and targets are constantly expanding, cache side-channel attacks have
gradually penetrated into various daily applications and brought great security risks. The …

Caching and Reproducibility: Making Data Science Experiments Faster and FAIRer

M Schubotz, A Satpute, A Greiner-Petter… - Frontiers in Research …, 2022 - frontiersin.org
Small to medium-scale data science experiments often rely on research software developed
ad-hoc by individual scientists or small teams. Often there is no time to make the research …

Implementation and Comparison of Direct mapped and 4-way Set Associative mapped Cache Controller in VHDL

G Kaur, R Arora, SS Panchal - 2021 8th International …, 2021 - ieeexplore.ieee.org
This paper presents the implementation of design of a non-pipelined processor that
generates memory read/write requests to a direct-mapped and a 4-way set associative …