S Zhu, B Xu, B Wu, K Soppimath… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
An area-efficient, time-domain folding ADC achieves a 10 GS/s conversion speed and a 6 bit resolution in 65 nm CMOS. The natural time-domain folding effect of the ring oscillator (RO) …
A Esmailiyan, F Schembari… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Dickson charge-pump (CP) is proposed here to realize a voltage-to-time converter (VTC) within an array of time-domain comparators of a 54-level time-mode subthreshold flash ADC …
T Kim, C Han, N Maghari - IEEE Journal of Solid-State Circuits, 2016 - ieeexplore.ieee.org
This paper presents a continuous-time (CT) delta-sigma modulator using a Gm-C based noise-shaped integrating quantizer (NSIQ) with a digital back-end integrator. By …
Due to the emerging systems with constraints in terms of power and costs, such as smart sensor interfaces for the Internet-of-Things, the design of the ADCs becomes very …
This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC) exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) …
A continuous-time (CT) delta-sigma modulator (ΔΣM), with 27.5 fJ/conv.-step energy efficiency, employing passive RC integrators is proposed. A simple differential pair is …
A second‐order loop filter (LF) that uses a single op‐amp resonator is presented for continuous‐time delta–sigma modulators. The proposed technique improves the power and …
C Han, N Maghari - IEEE Journal on Emerging and Selected …, 2015 - ieeexplore.ieee.org
This paper presents an efficient noise coupling scheme in time-interleaved delta-sigma modulators (DSMs). The traditional voltage domain quantization error extraction is replaced …