A 174.3-dB FoM VCO-Based CT Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS

S Li, A Mukherjee, N Sun - IEEE Journal of Solid-State Circuits, 2017 - ieeexplore.ieee.org
This paper presents a high dynamic range (DR) power-efficient voltage-controlled oscillator
(VCO)-based continuous-time ΔΣ modulator. It introduces a robust and low-power fully …

A skew-free 10 GS/s 6 bit CMOS ADC with compact time-domain signal folding and inherent DEM

S Zhu, B Xu, B Wu, K Soppimath… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
An area-efficient, time-domain folding ADC achieves a 10 GS/s conversion speed and a 6 bit
resolution in 65 nm CMOS. The natural time-domain folding effect of the ring oscillator (RO) …

A 0.36-V 5-MS/s time-mode flash ADC with Dickson-charge-pump-based comparators in 28-nm CMOS

A Esmailiyan, F Schembari… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Dickson charge-pump (CP) is proposed here to realize a voltage-to-time converter (VTC)
within an array of time-domain comparators of a 54-level time-mode subthreshold flash ADC …

A 7.2 mW 75.3 dB SNDR 10 MHz BW CT delta-sigma modulator using Gm-C-based noise-shaped quantizer and digital integrator

T Kim, C Han, N Maghari - IEEE Journal of Solid-State Circuits, 2016 - ieeexplore.ieee.org
This paper presents a continuous-time (CT) delta-sigma modulator using a Gm-C based
noise-shaped integrating quantizer (NSIQ) with a digital back-end integrator. By …

Continuous-time delta-sigma modulators based on passive RC integrators

JLA de Melo, N Paulino, J Goes - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Due to the emerging systems with constraints in terms of power and costs, such as smart
sensor interfaces for the Internet-of-Things, the design of the ADCs becomes very …

Dickson-charge-pump-based voltage-to-time conversion for time-based ADCs in 28-nm CMOS

A Esmailiyan, J Du, T Siriburanon… - IEEE Open Journal …, 2020 - ieeexplore.ieee.org
This article demonstrates a digitally friendly time-based analog-to-digital converter (ADC)
exploiting Dickson charge-pump (CP) as part of a voltage-to-time conversion (VTC) …

A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW

JLA de Melo, J Goes, N Paulino - 2015 Symposium on VLSI …, 2015 - ieeexplore.ieee.org
A continuous-time (CT) delta-sigma modulator (ΔΣM), with 27.5 fJ/conv.-step energy
efficiency, employing passive RC integrators is proposed. A simple differential pair is …

Stability analysis and optimization of CT DSMs with an NS SAR quantizer by a redistributed noise shaping technique

W Wang, K Pun - Microelectronics Journal, 2024 - Elsevier
Abstract Continuous-time (CT) Delta-Sigma modulators (DSMs) with a passive noise-
shaping (NS) successive-approxi-mation-register (SAR) analog-to-digital converter (ADC) …

Single op‐amp second‐order loop filter for continuous‐time delta–sigma modulators

YK Cho, BH Park - Electronics Letters, 2015 - Wiley Online Library
A second‐order loop filter (LF) that uses a single op‐amp resonator is presented for
continuous‐time delta–sigma modulators. The proposed technique improves the power and …

Time-interleaved noise-coupling delta-sigma modulator using modified noise-shaped integrating quantizer

C Han, N Maghari - IEEE Journal on Emerging and Selected …, 2015 - ieeexplore.ieee.org
This paper presents an efficient noise coupling scheme in time-interleaved delta-sigma
modulators (DSMs). The traditional voltage domain quantization error extraction is replaced …