A 180-mV subthreshold FFT processor using a minimum energy design methodology
A Wang, A Chandrakasan - IEEE Journal of solid-state circuits, 2005 - ieeexplore.ieee.org
In emerging embedded applications such as wireless sensor networks, the key metric is
minimizing energy dissipation rather than processor speed. Minimum energy analysis of …
minimizing energy dissipation rather than processor speed. Minimum energy analysis of …
A low-power 64-point pipeline FFT/IFFT processor for OFDM applications
4G and other wireless systems are currently hot topics of research and development in the
communication field. Broadband wireless systems based on orthogonal frequency division …
communication field. Broadband wireless systems based on orthogonal frequency division …
VLSI design and implementation of reconfigurable 46-mode combined-radix-based FFT hardware architecture for 3GPP-LTE applications
XY Shih, HR Chou, YQ Liu - … on Circuits and Systems I: Regular …, 2017 - ieeexplore.ieee.org
This paper presents a reconfigurable fast Fourier transform (FFT) hardware architecture,
supporting 46 different FFT sizes defined in 3GPP-LTE applications. Our proposed design …
supporting 46 different FFT sizes defined in 3GPP-LTE applications. Our proposed design …
48-Mode Reconfigurable Design of SDF FFT Hardware Architecture Using Radix-32 and Radix-23 Design Approaches
XY Shih, YQ Liu, HR Chou - … on Circuits and Systems I: Regular …, 2017 - ieeexplore.ieee.org
In this paper, we propose a reconfigurable (RC) fast Fourier transform (FFT) design in a
systematic design scheme. The RC design bricks are mainly proposed to arbitrarily …
systematic design scheme. The RC design bricks are mainly proposed to arbitrarily …
A low power and small area FFT processor for OFDM demodulator
X Li, Z Lai, J Cui - IEEE Transactions on Consumer Electronics, 2007 - ieeexplore.ieee.org
The FFT (fast Fourier transform) processor is the most speed and power consumption critical
part in the orthogonal frequency division multiplexing (OFDM) communication system. In this …
part in the orthogonal frequency division multiplexing (OFDM) communication system. In this …
High‐Performance Low‐Power FFT Cores
Recently, the power consumption of integrated circuits has been attracting increasing
attention. Many techniques have been studied to improve the power efficiency of digital …
attention. Many techniques have been studied to improve the power efficiency of digital …
A General Class of Split-Radix FFT Algorithms for the Computation of the DFT of Length-
S Bouguezel, MO Ahmad… - IEEE transactions on …, 2007 - ieeexplore.ieee.org
In this paper, a general class of split-radix fast Fourier transform (FFT) algorithms for
computing the length-2 m DFT is proposed by introducing a new recursive approach …
computing the length-2 m DFT is proposed by introducing a new recursive approach …
Improved radix-4 and radix-8 FFT algorithms
S Bouguezel, MO Ahmad… - 2004 IEEE International …, 2004 - ieeexplore.ieee.org
In this paper, improved algorithms for radix-4 and radix-8 FFT are presented. This is
achieved by re-indexing a subset of the output samples resulting from the conventional …
achieved by re-indexing a subset of the output samples resulting from the conventional …
Configurable FFT processor using dynamically reconfigurable resource arrays
This paper presents results of using a Coarse Grain Reconfigurable Architecture called
DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in …
DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in …
A 145µW 8× 8 parallel multiplier based on optimized bypassing architecture
A low-power parallel multiplier based on optimized bypassing architecture (OBA) is
proposed. The proposed OBA has two kinds of adder cells to reduce power consumption by …
proposed. The proposed OBA has two kinds of adder cells to reduce power consumption by …