High-speed electrical signaling: Overview and limitations

M Horowitz, CKK Yang, S Sidiropoulos - IEEE Micro, 1998 - ieeexplore.ieee.org
Advances in IC fabrication technology, coupled with aggressive circuit design, have led to
exponential growth of IC speed and integration levels. For these improvements to benefit …

A 0.54 pJ/b 20 Gb/s ground-referenced single-ended short-reach serial link in 28 nm CMOS for advanced packaging applications

JW Poulton, WJ Dally, X Chen, JG Eyles… - IEEE Journal of Solid …, 2013 - ieeexplore.ieee.org
High-speed signaling over high density interconnect on organic package substrates or
silicon interposers offers an attractive solution to the off-chip bandwidth limitation problem …

Communication system with low power, DC-balanced serial link

WJ Dally, JW Poulton - US Patent 7,199,728, 2007 - Google Patents
103 circuit integrates codewords by integrating for a first interval with a positive polarity
within a particular symbol cell, and integrating for a second interval with a negative polarity …

[图书][B] Design of high-speed serial links in CMOS

CKK Yang - 1999 - search.proquest.com
Demand for bandwidth in serial links has been increasing as the communications industry
demand higher quantity and quality of information. Whereas traditional gigabit per second …

Periodic interface calibration for high speed communication

JM Kizer - US Patent 7,072,355, 2006 - Google Patents
A high-speed communication interface manages a parallel bus having N bus lines. N+ 1
communication lines are established. A maintenance operation is performed on one of the …

Communication channel calibration for drift conditions

FA Ware, RE Perego, CE Hampel - US Patent 7,095,789, 2006 - Google Patents
(57) ABSTRACT A method and system provides for execution of calibration cycles from time
to time during normal operation of the communication channel. A calibration cycle includes …

[图书][B] Design of a CMOS Asymmetric Serial Link

KY Chang - 1999 - search.proquest.com
In recent years, there has been a growing interest in using high-speed serial links to improve
the bandwidth of chip interconnections. However, the use of many serial links in high fanin …

Hybrid wired and wireless chip-to-chip communications

SC Best - US Patent 7,535,958, 2009 - Google Patents
A hybrid wireless and wired system distributes precise timing and synchronization
information among the nodes over a wired interconnect structure while data is transmitted …

Drift tracking feedback for communication channels

SC Best, AM Abhyankar, KY Chang… - US Patent …, 2005 - Google Patents
A communication channel includes a first component having a transmitter coupled to a
normal signal source, and a second component having a receiver coupled to a normal …

Periodic calibration for communication channels by drift tracking

CE Hampel, FA Ware, RE Perego - US Patent 7,400,670, 2008 - Google Patents
A method and system that provides for execution of a first calibration sequence, such as
upon initialization of a system, to establish an operation value, which utilizes an algorithm …